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ORCIDSatrajit Chatterjee
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2020 – today
- 2024
[c22]Andrea Costamagna, Alan Mishchenko, Satrajit Chatterjee, Giovanni De Micheli:
An Enhanced Resubstitution Algorithm for Area-Oriented Logic Optimization. ISCAS 2024: 1-5- 2023
- [j5]Erwei Wang
, James J. Davis, Daniele Moro, Piotr Zielinski, Jia Jie Lim, Claudionor Coelho, Satrajit Chatterjee, Peter Y. K. Cheung, George A. Constantinides:
Enabling Binary Neural Network Training on the Edge. ACM Trans. Embed. Comput. Syst. 22(6): 105:1-105:19 (2023) - 2022
- [c21]Brady G. Moon, Satrajit Chatterjee, Sebastian A. Scherer:
TIGRIS: An Informed Sampling-based Algorithm for Informative Path Planning. IROS 2022: 5760-5766 - [i10]Satrajit Chatterjee, Piotr Zielinski:
On the Generalization Mystery in Deep Learning. CoRR abs/2203.10036 (2022) - [i9]Brady G. Moon, Satrajit Chatterjee, Sebastian A. Scherer:
TIGRIS: An Informed Sampling-based Algorithm for Informative Path Planning. CoRR abs/2203.12830 (2022) - [i8]Sungmin Bae, Piotr Zielinski, Satrajit Chatterjee:
A Closer Look at Hardware-Friendly Weight Quantization. CoRR abs/2210.03671 (2022) - 2021
- [c20]Shubham Rai, Walter Lau Neto, Yukio Miyasaka, Xinpei Zhang, Mingfei Yu, Qingyang Yi, Masahiro Fujita, Guilherme B. Manske, Matheus F. Pontes, Leomar S. da Rosa, Marilton S. de Aguiar, Paulo F. Butzen, Po-Chun Chien, Yu-Shan Huang, Hoa-Ren Wang, Jie-Hong R. Jiang, Jiaqi Gu, Zheng Zhao, Zixuan Jiang, David Z. Pan, Brunno A. Abreu, Isac de Souza Campos, Augusto Andre Souza Berndt, Cristina Meinhardt, Jônata Tyska Carvalho, Mateus Grellert, Sergio Bampi, Aditya Lohana, Akash Kumar, Wei Zeng, Azadeh Davoodi, Rasit Onur Topaloglu, Yuan Zhou, Jordan Dotzel, Yichi Zhang, Hanyu Wang, Zhiru Zhang, Valerio Tenace, Pierre-Emmanuel Gaillardon, Alan Mishchenko, Satrajit Chatterjee:
Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization. DATE 2021: 1026-1031 - [c19]Erwei Wang, James J. Davis, Daniele Moro, Piotr Zielinski, Jia Jie Lim, Claudionor Coelho, Satrajit Chatterjee, Peter Y. K. Cheung, George A. Constantinides:
Enabling Binary Neural Network Training on the Edge. EMDL@MobiSys 2021: 37-38 - [i7]Amir Yazdanbakhsh, Christof Angermüller, Berkin Akin, Yanqi Zhou, Albin Jones, Milad Hashemi, Kevin Swersky, Satrajit Chatterjee, Ravi Narayanaswami, James Laudon:
Apollo: Transferable Architecture Exploration. CoRR abs/2102.01723 (2021) - [i6]Erwei Wang, James J. Davis, Daniele Moro, Piotr Zielinski, Claudionor Coelho, Satrajit Chatterjee, Peter Y. K. Cheung, George A. Constantinides:
Enabling Binary Neural Network Training on the Edge. CoRR abs/2102.04270 (2021) - 2020
- [c18]Satrajit Chatterjee:
Coherent Gradients: An Approach to Understanding Generalization in Gradient Descent-based Optimization. ICLR 2020 - [c17]Satrajit Chatterjee, Alan Mishchenko:
Circuit-Based Intrinsic Methods to Detect Overfitting. ICML 2020: 1459-1468 - [i5]Satrajit Chatterjee:
Coherent Gradients: An Approach to Understanding Generalization in Gradient Descent-based Optimization. CoRR abs/2002.10657 (2020) - [i4]Piotr Zielinski, Shankar Krishnan, Satrajit Chatterjee:
Explaining Memorization and Generalization: A Large-Scale Study with Coherent Gradients. CoRR abs/2003.07422 (2020) - [i3]Satrajit Chatterjee, Piotr Zielinski:
Making Coherence Out of Nothing At All: Measuring the Evolution of Gradient Alignment. CoRR abs/2008.01217 (2020) - [i2]Shubham Rai, Walter Lau Neto, Yukio Miyasaka, Xinpei Zhang, Mingfei Yu, Qingyang Yi, Masahiro Fujita, Guilherme B. Manske, Matheus F. Pontes, Leomar S. da Rosa Jr., Marilton S. de Aguiar, Paulo F. Butzen, Po-Chun Chien, Yu-Shan Huang, Hoa-Ren Wang, Jie-Hong R. Jiang, Jiaqi Gu, Zheng Zhao, Zixuan Jiang, David Z. Pan, Brunno A. Abreu, Isac de Souza Campos, Augusto Andre Souza Berndt, Cristina Meinhardt, Jônata Tyska Carvalho, Mateus Grellert, Sergio Bampi, Aditya Lohana, Akash Kumar, Wei Zeng, Azadeh Davoodi, Rasit Onur Topaloglu, Yuan Zhou, Jordan Dotzel, Yichi Zhang, Hanyu Wang, Zhiru Zhang, Valerio Tenace, Pierre-Emmanuel Gaillardon, Alan Mishchenko, Satrajit Chatterjee:
Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization. CoRR abs/2012.02530 (2020)
2010 – 2019
- 2019
- [i1]Satrajit Chatterjee, Alan Mishchenko:
Circuit-Based Intrinsic Methods to Detect Overfitting. CoRR abs/1907.01991 (2019) - 2018
- [c16]Satrajit Chatterjee:
Learning and Memorization. ICLR (Workshop) 2018 - [c15]Satrajit Chatterjee:
Learning and Memorization. ICML 2018: 754-762 - 2012
- [j4]Satrajit Chatterjee, Michael Kishinevsky, Ümit Y. Ogras:
xMAS: Quick Formal Modeling of Communication Fabrics to Enable Verification. IEEE Des. Test Comput. 29(3): 80-88 (2012) - [j3]Satrajit Chatterjee, Michael Kishinevsky:
Automatic generation of inductive invariants from high-level microarchitectural models of communication fabrics. Formal Methods Syst. Des. 40(2): 147-169 (2012) - 2011
- [c14]Chen-Ling Chou, Radu Marculescu, Ümit Y. Ogras, Satrajit Chatterjee, Michael Kishinevsky, Dmitrii Loukianov:
System interconnect design exploration for embedded MPSoCs. SLIP 2011: 1-8 - [c13]Alexander Gotmanov, Satrajit Chatterjee, Michael Kishinevsky:
Verifying Deadlock-Freedom of Communication Fabrics. VMCAI 2011: 214-231 - 2010
- [c12]Satrajit Chatterjee, Michael Kishinevsky:
Automatic Generation of Inductive Invariants from High-Level Microarchitectural Models of Communication Fabrics. CAV 2010: 321-338 - [c11]Satrajit Chatterjee, Michael Kishinevsky, Ümit Y. Ogras:
Quick formal modeling of communication fabrics to enable verification. HLDVT 2010: 42-49 - [c10]Nikita Nikitin, Satrajit Chatterjee, Jordi Cortadella, Michael Kishinevsky, Ümit Y. Ogras:
Physical-Aware Link Allocation and Route Assignment for Chip Multiprocessing. NOCS 2010: 125-134
2000 – 2009
- 2008
- [c9]Alan Mishchenko, Robert K. Brayton, Satrajit Chatterjee:
Boolean factoring and decomposition of logic networks. ICCAD 2008: 38-44 - 2007
- [j2]Alan Mishchenko, Satrajit Chatterjee, Robert K. Brayton:
Improvements to Technology Mapping for LUT-Based FPGAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(2): 240-253 (2007) - [c8]Satrajit Chatterjee, Alan Mishchenko, Robert K. Brayton, Andreas Kuehlmann:
On Resolution Proofs for Combinational Equivalence. DAC 2007: 600-605 - [c7]Alan Mishchenko, Sungmin Cho, Satrajit Chatterjee, Robert K. Brayton:
Combinational and sequential mapping with priority cuts. ICCAD 2007: 354-361 - 2006
- [j1]Satrajit Chatterjee, Alan Mishchenko, Robert K. Brayton, Xinning Wang, Timothy Kam:
Reducing Structural Bias in Technology Mapping. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(12): 2894-2903 (2006) - [c6]Alan Mishchenko, Satrajit Chatterjee, Robert K. Brayton:
DAG-aware AIG rewriting a fresh look at combinational logic synthesis. DAC 2006: 532-535 - [c5]Alan Mishchenko, Satrajit Chatterjee, Robert K. Brayton:
Improvements to technology mapping for LUT-based FPGAs. FPGA 2006: 41-49 - [c4]Satrajit Chatterjee, Alan Mishchenko, Robert K. Brayton:
Factor cuts. ICCAD 2006: 143-150 - [c3]Alan Mishchenko, Satrajit Chatterjee, Robert K. Brayton, Niklas Eén:
Improvements to combinational equivalence checking. ICCAD 2006: 836-843 - 2005
- [c2]Satrajit Chatterjee, Alan Mishchenko, Robert K. Brayton, Xinning Wang, Timothy Kam:
Reducing structural bias in technology mapping. ICCAD 2005: 519-526 - 2004
- [c1]Satrajit Chatterjee, Robert K. Brayton:
A new incremental placement algorithm and its application to congestion-aware divisor extraction. ICCAD 2004: 541-548
Coauthor Index
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