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2020 – today
- 2022
[c39]Dariusz Wasicki, Tadeusz Luba:
Data Analysis and Mining Using Logical Synthesis Methods. MIXDES 2022: 165-170- 2020
- [c38]Grzegorz Borowik, Tadeusz Luba, Ryszard Klempous:
Comparison of algorithms for dimensionality reduction and their application to index generation functions. SoSE 2020: 283-288
2010 – 2019
- 2019
- [c37]Tomasz Mazurkiewicz
, Tadeusz Luba:
Linear and Non-linear Decomposition of Index Generation Functions. MIXDES 2019: 246-251 - [c36]Tomasz Mazurkiewicz, Tadeusz Luba:
Non-disjoint Decomposition Using r-admissibility and Graph Coloring and Its Application in Index Generation Functions Minimization. MIXDES 2019: 252-256 - 2015
- [j12]Tomasz Wandowski, Pawel Malinowski, Wieslaw Ostachowicz, Mariusz Rawski, Pawel Tomaszewicz, Tadeusz Luba, Grzegorz Borowik:
Embedded Damage Localization Subsystem Based on Elastic Wave Propagation. Comput. Aided Civ. Infrastructure Eng. 30(8): 654-665 (2015) - [c35]Michal Mankowski, Tadeusz Luba, Cezary Jankowski:
Evaluation of Decision Table Decomposition Using Dynamic Programming Classifiers. CS&P 2015: 34-43 - [e1]Grzegorz Borowik, Zenon Chaczko, Witold Jacak, Tadeusz Luba:
Computational Intelligence and Efficiency in Engineering Systems. Studies in Computational Intelligence 595, Springer 2015, ISBN 978-3-319-15719-1 [contents] - 2014
- [c34]Grzegorz Borowik, Andrzej Krasniewski, Tadeusz Luba:
Rule Induction Based on Logic Synthesis Methods. ICSEng 2014: 813-816 - 2012
- [j11]Cicilia C. Lozano, Bogdan J. Falkowski, Tadeusz Luba:
Fixed Polarity Linearly Independent Expansions for the Representation of Quaternary Functions. J. Multiple Valued Log. Soft Comput. 19(4): 307-324 (2012) - 2011
- [j10]Dawid Zydek, Henry Selvaraj, Grzegorz Borowik, Tadeusz Luba:
Energy characteristic of a processor allocator and a network-on-chip. Int. J. Appl. Math. Comput. Sci. 21(2): 385-399 (2011) - [c33]Grzegorz Borowik, Tadeusz Luba, Pawel Tomaszewicz:
On Memory Capacity to Implement Logic Functions. EUROCAST (2) 2011: 343-350 - [c32]Grzegorz Borowik, Tadeusz Luba, Dawid Zydek:
Reduction of Knowledge Representation Using Logic Minimization Techniques. ICSEng 2011: 482-485
2000 – 2009
- 2009
- [c31]Grzegorz Borowik, Tadeusz Luba, Bogdan J. Falkowski:
Logic synthesis method for pattern matching circuits implementation in FPGA with embedded memories. DDECS 2009: 230-233 - [c30]Grzegorz Borowik, Tadeusz Luba:
Decomposing Pattern Matching Circuit. EUROCAST 2009: 563-570 - [c29]Cicilia C. Lozano, Bogdan J. Falkowski, Tadeusz Luba:
Two classes of fixed polarity linearly independent arithmetic transforms for quaternary functions. EUSIPCO 2009: 421-425 - [c28]Cicilia C. Lozano, Bogdan J. Falkowski, Tadeusz Luba:
Decision diagram based computation of linearly independent ternary arithmetic transform spectra. EUSIPCO 2009: 973-977 - [c27]Cicilia C. Lozano, Bogdan J. Falkowski, Tadeusz Luba:
Fixed Polarity Quaternary Transforms Derived from Linearly Independent Transform over GF(2) Structure. ISMVL 2009: 318-323 - 2008
- [c26]Mariusz Rawski, Tadeusz Luba, Bogdan J. Falkowski:
Logic synthesis method for FPGAs with embedded memory blocks. ISCAS 2008: 2014-2017 - [c25]Cicilia C. Lozano, Bogdan J. Falkowski, Tadeusz Luba:
Properties and Computational Algorithm for Fastest Quaternary Linearly Independent Transforms. ISMVL 2008: 226-231 - 2007
- [j9]Bogdan J. Falkowski, Cicilia C. Lozano, Tadeusz Luba:
Family of Fastest Linearly Independent Transforms over GF(3): Generation, Relations, and Hardware Implementation. J. Multiple Valued Log. Soft Comput. 13(4-6): 379-396 (2007) - [c24]Grzegorz Borowik, Bogdan J. Falkowski, Tadeusz Luba:
Cost-Efficient Synthesis for Sequential Circuits Implemented Using Embedded Memory Blocks of FPGAs. DDECS 2007: 99-104 - [c23]Bogdan J. Falkowski, Cicilia C. Lozano, Tadeusz Luba:
Properties and relations of new fastest linearly independent arithmetic transforms for ternary functions. EUSIPCO 2007: 2129-2133 - [c22]Bogdan J. Falkowski, Cicilia C. Lozano, Tadeusz Luba:
New Fastest Linearly Independent Transforms over GF(3). ISMVL 2007: 15 - [c21]Bogdan J. Falkowski, Cicilia C. Lozano, Tadeusz Luba:
Efficient Algorithm for Calculation of Quaternardy Fixed Polarity Arithmetic Expansions. ISMVL 2007: 23 - 2006
- [j8]Henry Selvaraj, Piotr Sapiecha, Mariusz Rawski, Tadeusz Luba:
Functional Decomposition - the Value and Implication for Both Neural Networks and Digital Designing. Int. J. Comput. Intell. Appl. 6(1): 123-138 (2006) - [j7]Mariusz Rawski, Henry Selvaraj, Tadeusz Luba, Piotr Szotkowski:
Multilevel Synthesis of Finite State Machines Based on Symbolic Functional Decomposition. Int. J. Comput. Intell. Appl. 6(2): 257-271 (2006) - 2005
- [j6]Mariusz Rawski, Henry Selvaraj, Tadeusz Luba:
An application of functional decomposition in ROM-based FSM implementation in FPGA devices. J. Syst. Archit. 51(6-7): 424-434 (2005) - [c20]Mariusz Rawski, Pawel Tomaszewicz, Henry Selvaraj, Tadeusz Luba:
Efficient Implementation of Digital Filters with Use of Advanced Synthesis Methods Targeted FPGA Architectures. DSD 2005: 460-466 - [c19]Henry Selvaraj, Pawel Tomaszewicz, Mariusz Rawski, Tadeusz Luba:
Efficient Application of Modern Logic Synthesis in FPGA-Based Designing of Information and Signal Processing Systems. ITCC (2) 2005: 22-27 - 2004
- [c18]Piotr Sapiecha, Henry Selvaraj, Jaroslaw Tomasz Stanczak, Krzysztof Sep, Tadeusz Luba:
A Hybrid Approach to a Classification Problem. Intelligent Information Systems 2004: 99-106 - 2003
- [j5]Janusz A. Brzozowski, Tadeusz Luba:
Decomposition of Boolean Functions Specified by Cubes. J. Multiple Valued Log. Soft Comput. 9(4): 377-417 (2003) - [c17]Mariusz Rawski, Henry Selvaraj, Tadeusz Luba:
An Application of Functional Decomposition in ROM-Based FSM Implementation in FPGA Devices. DSD 2003: 104-111 - [c16]Michal Pleban, Hubert Niewiadomski, Piotr Buciak, Henry Selvaraj, Piotr Sapiecha, Tadeusz Luba:
NOAH, a tool for argument reduction, serial and parallel decomposition of decision tables. DSD 2003: 248-254 - 2002
- [c15]Henry Selvaraj, Mariusz Rawski, Tadeusz Luba:
FSM Implementation in Embedded Memory Blocks of Programmable Logic Devices Using Functional Decomposition. ITCC 2002: 355-360 - 2001
- [j4]Henry Selvaraj, Piotr Sapiecha, Tadeusz Luba:
Functional Decomposition and Its Applications in Machine Learning and Neural Networks. Int. J. Comput. Intell. Appl. 1(3): 259-271 (2001) - [j3]Mariusz Rawski, Lech Józwiak, Tadeusz Luba:
Functional decomposition with an efficient input support selection for sub-functions based on information relationship measures. J. Syst. Archit. 47(2): 137-155 (2001) - 2000
- [c14]Tadeusz Luba, Claudio Moraga, Svetlana N. Yanushkevich, Vlad P. Shmerko, Joanna Kolodziejczyk:
Application of Design Style in Evolutionary Multi-Level Networks Synthesis. EUROMICRO 2000: 1156-1163 - [c13]Tadeusz Luba, Claudio Moraga, Svetlana N. Yanushkevich, M. Opoka, Vlad P. Shmerko:
Evolutionary Multi-Level Network Synthesis in Given Design Style. ISMVL 2000: 253-258
1990 – 1999
- 1999
- [c12]Mariusz Rawski, Lech Józwiak, Tadeusz Luba:
The Influence of the Number of Values in Sub-Functions on the Effectiveness and Efficiency of the Functional Decomposition. EUROMICRO 1999: 1086-1093 - [c11]Mariusz Rawski, Lech Józwiak, Tadeusz Luba:
Efficient Input Support Selection for Sub-functions in Functional Decomposition Based on Information Relationship Measures. EUROMICRO 1999: 1094-1101 - [c10]Rafal Rzechowski, Tadeusz Luba, Lech Józwiak:
Technology Driven Multilevel Logic Synthesis Based on Functional Decomposition into Gates. EUROMICRO 1999: 1368-1375 - 1998
- [c9]Mariusz Rawski, Tadeusz Luba, Lech Józwiak, Artur Chojnacki:
Efficient Logic Synthesis for FPGAs with Functional Decomposition Based on Information Relationship Measure. EUROMICRO 1998: 10008-10015 - [c8]Henry Selvaraj, Miroslawa Nowicka, Tadeusz Luba:
Decomposition Strategies and their Performance in Fpga-Based Technology Mapping. VLSI Design 1998: 388-393 - 1997
- [c7]Marek A. Perkowski, Malgorzata Marek-Sadowska, Lech Józwiak, Tadeusz Luba, Stan Grygiel, Miroslawa Nowicka, Rahul Malvi, Zhi Wang, Jin S. Zhang:
Decomposition of Multiple-Valued Relations . ISMVL 1997: 13-18 - [c6]Stan Grygiel, Marek A. Perkowski, Malgorzata Marek-Sadowska, Tadeusz Luba, Lech Józwiak:
Cube Diagram Bundles: A New Representation of Strongly Unspecified Multiple-Valued Functions and Relations. ISMVL 1997: 287-292 - 1995
- [j2]Tadeusz Luba, Henry Selvaraj:
A General Approach to Boolean Function Decomposition and its Application in FPGABased Synthesis. VLSI Design 3(3-4): 289-300 (1995) - [c5]Henry Selvaraj, Tadeusz Luba:
A balanced multilevel decomposition method. ED&TC 1995: 594 - [c4]Tadeusz Luba:
Decomposition of Multiple-Valued Functions. ISMVL 1995: 256-263 - 1994
- [j1]Tadeusz Luba:
Multi-level logic synthesis based on decomposition. Microprocess. Microsystems 18(8): 429-437 (1994) - 1993
- [c3]Tadeusz Luba, Robert Lasocki, Janusz Rybnik:
An Implementation of Decomposition Algorithm and its Application in Information System Analysis and Logic Synthesis. RSKD 1993: 458-465 - 1992
- [c2]Tadeusz Luba, K. Górski, Leszek B. Wronski:
ROM-based finite state machines with PLA address modifiers. EURO-DAC 1992: 272-277 - [p1]Tadeusz Luba, Janusz Rybnik:
Rough Sets and Some Aspects of Logic Synthesis. Intelligent Decision Support 1992: 181-199 - 1991
- [c1]Tadeusz Luba, Jerzy Kalinowski, Krzysztof Jasinski:
PLATO: a CAD tool for logic synthesis based on decomposition. EURO-DAC 1991: 65-69
Coauthor Index
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