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2020 – today
- 2024
[j85]Mohammad Cheshfar, Mohammad Hossein Maghami, Parviz Amiri, Hossein Gharaee Garakani, Luciano Lavagno:
Comparative Survey of Embedded System Implementations of Convolutional Neural Networks in Autonomous Cars Applications. IEEE Access 12: 182410-182437 (2024)- [j84]Lorenzo Lagostina
, Filippo Minnella, Jordi Cortadella, Mario R. Casu, Mihai T. Lazarescu, Luciano Lavagno:
Mix & Latch: Comparison With State-of-the-Art Retiming on a RISC-V Benchmark. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(7): 2229-2233 (2024) - [c154]Roberto Bosio, Giovanni Brignone, Filippo Minnella, M. Usman Jamal, Luciano Lavagno:
LESS: Low-Power Energy-Efficient Subgraph Isomorphism on FPGA. DATE 2024: 1-2 - [i7]Giovanni Brignone, Roberto Bosio, Fabrizio Ottati, Claudio Sansoè, Luciano Lavagno:
SILVIA: Automated Superword-Level Parallelism Exploitation via HLS-Specific LLVM Passes for Compute-Intensive FPGA Accelerators. CoRR abs/2411.11384 (2024) - 2023
- [j83]Filippo Minnella, Jordi Cortadella, Mario R. Casu, Mihai T. Lazarescu, Luciano Lavagno:
Mix & Latch: An Optimization Flow for High-Performance Designs With Single-Clock Mixed-Polarity Latches and Flip-Flops. IEEE Access 11: 35830-35840 (2023) - [j82]M. Usman Jamal, Zhuowei Li, Mihai T. Lazarescu, Luciano Lavagno:
A Graph Neural Network Model for Fast and Accurate Quality of Result Estimation for High-Level Synthesis. IEEE Access 11: 85785-85798 (2023) - [j81]Fabrizio Ottati, Chang Gao, Qinyu Chen, Giovanni Brignone, Mario R. Casu, Jason K. Eshraghian, Luciano Lavagno:
To Spike or Not to Spike: A Digital Hardware Perspective on Deep Learning Acceleration. IEEE J. Emerg. Sel. Topics Circuits Syst. 13(4): 1015-1025 (2023) - [c153]Giovanni Brignone, Mihai T. Lazarescu, Luciano Lavagno:
A DSP shared is a DSP earned: HLS Task-Level Multi-Pumping for High-Performance Low-Resource Designs. ICCD 2023: 551-557 - [c152]Giorgia Subbicini, Luciano Lavagno, Mihai T. Lazarescu:
Enhanced Exploration of Neural Network Models for Indoor Human Monitoring. IWASI 2023: 109-114 - [i6]Cristina Silvano, Daniele Ielmini, Fabrizio Ferrandi, Leandro Fiorin, Serena Curzel, Luca Benini, Francesco Conti, Angelo Garofalo, Cristian Zambelli, Enrico Calore, Sebastiano Fabio Schifano, Maurizio Palesi, Giuseppe Ascia, Davide Patti, Stefania Perri, Nicola Petra, Davide De Caro, Luciano Lavagno, Teodoro Urso, Valeria Cardellini, Gian Carlo Cardarilli, Robert Birke:
A Survey on Deep Learning Hardware Accelerators for Heterogeneous HPC Platforms. CoRR abs/2306.15552 (2023) - [i5]Fabrizio Ottati, Chang Gao, Qinyu Chen, Giovanni Brignone, Mario R. Casu, Jason K. Eshraghian, Luciano Lavagno:
To Spike or Not To Spike: A Digital Hardware Perspective on Deep Learning Acceleration. CoRR abs/2306.15749 (2023) - [i4]Filippo Minnella, Teodoro Urso, Mihai T. Lazarescu, Luciano Lavagno:
Design and Optimization of Residual Neural Network Accelerators for Low-Power FPGAs Using High-Level Synthesis. CoRR abs/2309.15631 (2023) - [i3]Giovanni Brignone, Mihai T. Lazarescu, Luciano Lavagno:
A DSP shared is a DSP earned: HLS Task-Level Multi-Pumping for High-Performance Low-Resource Designs. CoRR abs/2310.00330 (2023) - [i2]Fabrizio Ferrandi, Serena Curzel, Leandro Fiorin, Daniele Ielmini, Cristina Silvano, Francesco Conti, Alessio Burrello, Francesco Barchi, Luca Benini, Luciano Lavagno, Teodoro Urso, Enrico Calore, Sebastiano Fabio Schifano, Cristian Zambelli, Maurizio Palesi, Giuseppe Ascia, Enrico Russo, Nicola Petra, Davide De Caro, Gennaro Di Meo, Valeria Cardellini, Salvatore Filippone, Francesco Lo Presti, Francesco Silvestri, Paolo Palazzari, Stefania Perri:
A Survey on Design Methodologies for Accelerating Deep Learning on Heterogeneous Architectures. CoRR abs/2311.17815 (2023) - 2022
- [j80]Giovanni Brignone, M. Usman Jamal, Mihai T. Lazarescu, Luciano Lavagno:
Array-Specific Dataflow Caches for High-Level Synthesis of Memory-Intensive Algorithms on FPGAs. IEEE Access 10: 118858-118877 (2022) - [j79]Nasir Ali Shah, Mihai T. Lazarescu, Roberto Quasso, Salvatore Scarpina, Luciano Lavagno:
FPGA Acceleration of 3GPP Channel Model Emulator for 5G New Radio. IEEE Access 10: 119386-119401 (2022) - [j78]Junnan Shan, Mihai T. Lazarescu, Jordi Cortadella, Luciano Lavagno, Mario R. Casu:
Fast Energy-Optimal Multikernel DNN-Like Application Allocation on Multi-FPGA Platforms. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(4): 1186-1190 (2022) - 2021
- [j77]Osama Bin Tariq, Junnan Shan, Georgios Floros, Christos P. Sotiriou, Mario R. Casu, Mihai Teodor Lazarescu, Luciano Lavagno:
High-Level Annotation of Routing Congestion for Xilinx Vivado HLS Designs. IEEE Access 9: 54286-54297 (2021) - [j76]Junnan Shan, Mihai T. Lazarescu, Jordi Cortadella, Luciano Lavagno, Mario R. Casu:
CNN-on-AWS: Efficient Allocation of Multikernel Applications on Multi-FPGA Platforms. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(2): 301-314 (2021) - 2020
- [j75]Arslan Arif, Felipe A. Barrigon, Francesco Gregoretti, Javed Iqbal, Luciano Lavagno, Mihai Teodor Lazarescu, Liang Ma, Manuel Palomino, Javier L. L. Segura:
Performance and energy-efficient implementation of a smart city application on FPGAs. J. Real Time Image Process. 17(3): 729-743 (2020) - [j74]Junnan Shan, Mihai T. Lazarescu, Jordi Cortadella, Luciano Lavagno, Mario R. Casu:
Power-Optimal Mapping of CNN Applications to Cloud-Based Multi-FPGA Platforms. IEEE Trans. Circuits Syst. 67-II(12): 3073-3077 (2020)
2010 – 2019
- 2019
- [c151]Junnan Shan, Mario R. Casu, Jordi Cortadella, Luciano Lavagno, Mihai T. Lazarescu:
Exact and Heuristic Allocation of Multi-kernel Applications to Multi-FPGA Platforms. DAC 2019: 3 - [c150]Yifan Yang, Qijing Huang, Bichen Wu, Tianjun Zhang, Liang Ma, Giulio Gambardella, Michaela Blott, Luciano Lavagno, Kees A. Vissers, John Wawrzynek, Kurt Keutzer:
Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs. FPGA 2019: 23-32 - [c149]Osama Bin Tariq, Mihai Teodor Lazarescu, Luciano Lavagno:
Neural network-based indoor tag-less localization using capacitive sensors. UbiComp/ISWC Adjunct 2019: 9-12 - 2018
- [j73]Mehdi Roozmeh, Luciano Lavagno:
Design space exploration of multi-core RTL via high level synthesis from OpenCL models. Microprocess. Microsystems 63: 199-208 (2018) - [j72]Javed Iqbal, Mihai Teodor Lazarescu, Osama Bin Tariq, Arslan Arif, Luciano Lavagno:
Capacitive Sensor for Tagless Remote Human Identification Using Body Frequency Absorption Signatures. IEEE Trans. Instrum. Meas. 67(4): 789-797 (2018) - [c148]Pavlos Malakonakis, Konstantinos Georgopoulos, Aggelos Ioannou, Luciano Lavagno, Ioannis Papaefstathiou, Iakovos Mavroidis:
HLS Algorithmic Explorations for HPC Execution on Reconfigurable Hardware - ECOSCALE. ARC 2018: 724-736 - [c147]Christian Palmiero, Giuseppe Di Guglielmo, Luciano Lavagno, Luca P. Carloni:
Design and Implementation of a Dynamic Information Flow Tracking Architecture to Secure a RISC-V Core for IoT Applications. HPEC 2018: 1-7 - [i1]Yifan Yang, Qijing Huang, Bichen Wu, Tianjun Zhang, Liang Ma, Giulio Gambardella, Michaela Blott, Luciano Lavagno, Kees A. Vissers, John Wawrzynek, Kurt Keutzer:
Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs. CoRR abs/1811.08634 (2018) - 2017
- [j71]Fahad Bin Muslim, Liang Ma, Mehdi Roozmeh, Luciano Lavagno:
Efficient FPGA Implementation of OpenCL High-Performance Computing Applications via High-Level Synthesis. IEEE Access 5: 2747-2762 (2017) - [j70]Affaq Qamar, Fahad Bin Muslim, Francesco Gregoretti, Luciano Lavagno, Mihai Teodor Lazarescu:
High-Level Synthesis for Semi-Global Matching: Is the Juice Worth the Squeeze? IEEE Access 5: 8419-8432 (2017) - [j69]Osama Bin Tariq, Mihai Teodor Lazarescu, Javed Iqbal, Luciano Lavagno:
Performance of Machine Learning Classifiers for Indoor Person Localization With Capacitive Sensors. IEEE Access 5: 12913-12926 (2017) - [j68]Liang Ma, Luciano Lavagno, Mihai Teodor Lazarescu, Arslan Arif:
Acceleration by Inline Cache for Memory-Intensive Algorithms on FPGA via High-Level Synthesis. IEEE Access 5: 18953-18974 (2017) - [j67]Affaq Qamar, Fahad Bin Muslim, Javed Iqbal, Luciano Lavagno:
LP-HLS: Automatic power-intent generation for high-level synthesis based hardware implementation flow. Microprocess. Microsystems 50: 26-38 (2017) - [c146]Javed Iqbal, Mihai Teodor Lazarescu, Osama Bin Tariq, Luciano Lavagno:
Long range, high sensitivity, low noise capacitive sensor for tagless indoor human localization. IWASI 2017: 189-194 - [c145]Mehdi Roozmeh, Luciano Lavagno:
Implementation of a performance optimized database join operation on FPGA-GPU platforms using OpenCL. NORCAS 2017: 1-6 - [c144]Javed Iqbal, Mihai Teodor Lazarescu, Arslan Arif, Luciano Lavagno:
High sensitivity, low noise front-end for long range capacitive sensors for tagless indoor human localization. RTSI 2017: 1-6 - [p4]Mihai Teodor Lazarescu, Luciano Lavagno:
Wireless Sensor Networks. Handbook of Hardware/Software Codesign 2017: 1261-1302 - 2016
- [j66]Christos P. Antonopoulos, Katerina Asimogloy, Sarah Chiti, Luca D'Onofrio, Simone Gianfranceschi, Danping He, Antonio Iodice, Stavros A. Koubias, Christos Koulamas, Luciano Lavagno, Mihai T. Lazarescu, Gabriel Mujica, George D. Papadopoulos, Jorge Portilla, Luis M. Redondo, Daniele Riccio, Teresa Riesgo, Daniel Rodríguez, Giuseppe Ruello, Vasilis Samoladas, Tsenka Stoyanova, Gerasimos Touliatos, Angela Valvo, Georgia Vlahoy:
Integrated Toolset for WSN Application Planning, Development, Commissioning and Maintenance: The WSN-DPCM ARTEMIS-JU Project. Sensors 16(6): 804 (2016) - [j65]Alireza Ramezani Akhmareh, Mihai Teodor Lazarescu, Osama Bin Tariq, Luciano Lavagno:
A Tagless Indoor Localization System Based on Capacitive Sensing Technology. Sensors 16(9): 1448 (2016) - [j64]Shahzad Ahmad Butt, Mehdi Roozmeh, Luciano Lavagno:
Designing Parameterizable Hardware IPs in a Model-Based Design Environment for High-Level Synthesis. ACM Trans. Embed. Comput. Syst. 15(2): 32:1-32:28 (2016) - [c143]Iakovos Mavroidis, Ioannis Papaefstathiou, Luciano Lavagno, Dimitrios S. Nikolopoulos, Dirk Koch, John Goodacre, Ioannis Sourdis, Vassilis Papaefstathiou, Marcello Coppola, Manuel Palomino:
ECOSCALE: Reconfigurable computing and runtime system for future exascale systems. DATE 2016: 696-701 - [c142]Liang Ma, Fahad Bin Muslim, Luciano Lavagno:
High Performance and Low Power Monte Carlo Methods to Option Pricing Models via High Level Design and Synthesis. EMS 2016: 157-162 - [c141]Fahad Bin Muslim, Alexandros Demian, Liang Ma, Luciano Lavagno, Affaq Qamar:
Energy-efficient FPGA Implementation of the k-Nearest Neighbors Algorithm Using OpenCL. FedCSIS (Position Papers) 2016: 141-145 - 2015
- [j63]Alberto Puggelli, Mohammad Mostafizur Rahman Mozumdar, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli:
Routing-Aware Design of Indoor Wireless Sensor Networks Using an Interactive Tool. IEEE Syst. J. 9(3): 714-727 (2015) - [j62]Marco Cannizzaro, Salomon Beer, Jordi Cortadella, Ran Ginosar, Luciano Lavagno:
SafeRazor: Metastability-Robust Adaptive Clocking in Resilient Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(9): 2238-2247 (2015) - [j61]Mihai T. Lazarescu, Luciano Lavagno:
Interactive Trace-Based Analysis Toolset for Manual Parallelization of C Programs. ACM Trans. Embed. Comput. Syst. 14(1): 13:1-13:20 (2015) - [j60]Parinaz Sayyah, Mihai T. Lazarescu, Sara Bocchio, Emad Samuel Malki Ebeid, Gianluca Palermo, Davide Quaglia, Alberto Rosti, Luciano Lavagno:
Virtual Platform-Based Design Space Exploration of Power-Efficient Distributed Embedded Applications. ACM Trans. Embed. Comput. Syst. 14(3): 49:1-49:25 (2015) - [c140]Jordi Cortadella, Luciano Lavagno, Pedro Lopez, Marc Lupon, Alberto Moreno, Antoni Roca, Sachin S. Sapatnekar:
Reactive clocks with variability-tracking jitter. ICCD 2015: 511-518 - [c139]Fahad Bin Muslim, Affaq Qamar, Luciano Lavagno:
Low power methodology for an ASIC design flow based on high-level synthesis. SoftCOM 2015: 11-15 - [c138]Affaq Qamar, Fahad Bin Muslim, Luciano Lavagno:
Analysis and Implementation of the Semi-Global Matching 3D Vision Algorithm Using Code Transformations and High-Level Synthesis. VTC Spring 2015: 1-5 - 2014
- [j59]Sarmad Ullah Khan, Luciano Lavagno, Claudio Pastrone, Maurizio A. Spirito:
Online Authentication and Key Establishment Scheme for Heterogeneous Sensor Networks. Int. J. Distributed Sens. Networks 10 (2014) - [j58]Sarmad Ullah Khan, Claudio Pastrone, Luciano Lavagno, Maurizio A. Spirito:
A Secure Online Key Establishment Scheme for Mobile Heterogeneous Sensor Networks. Int. J. Distributed Sens. Networks 10 (2014) - [j57]Shahzad Ahmad Butt, Stéphane Mancini, Frédéric Rousseau, Luciano Lavagno:
Design of a pseudo-log image transform hardware accelerator in a high-level synthesis-based memory management framework. J. Electronic Imaging 23(5): 053012 (2014) - [j56]Héctor Posadas, Alejandro Nicolás, Pablo Peñil, Eugenio Villar, Florian Broekaert, Michel Bourdellès, Albert Cohen, Mihai T. Lazarescu, Luciano Lavagno, Andrei Sergeevich Terechko, Miguel Glassee, Manuel Prieto:
Improving the design flow for parallel and heterogeneous architectures running real-time applications: The PHARAON FP7 project. Microprocess. Microsystems 38(8): 960-975 (2014) - [j55]Mohammad Mozumdar, Zhen Yu Song, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli:
A Model-Based Approach for Bridging Virtual and Physical Sensor Nodes in a Hybrid Simulation Framework. Sensors 14(6): 11070-11096 (2014) - [c137]Salomon Beer, Marco Cannizzaro, Jordi Cortadella, Ran Ginosar, Luciano Lavagno:
Metastability in Better-Than-Worst-Case Designs. ASYNC 2014: 101-102 - [c136]Mihai T. Lazarescu, Albert Cohen, Adrien Guatto, Nhat Minh Lê, Luciano Lavagno, Antoniu Pop, Manuel Prieto, Andrei Sergeevich Terechko, Alexandru Sutii:
Energy-aware parallelization flow and toolset for C code. SCOPES 2014: 79-88 - 2013
- [j54]Luciano Lavagno, Mihai T. Lazarescu, Ioannis Papaefstathiou, Andreas Brokalakis, Johan Walters, Bart Kienhuis, Florian Schäfer:
HEAP: A Highly Efficient Adaptive multi-Processor framework. Microprocess. Microsystems 37(8-C): 1050-1062 (2013) - [c135]Alex Kondratyev, Luciano Lavagno, Mike Meyer, Yosinori Watanabe:
Share with care: a quantitative evaluation of sharing approaches in high-level synthesis. DATE 2013: 1547-1552 - [c134]Hector Posadas, Eugenio Villar, Florian Broekaert, Michel Bourdellès, Albert Cohen, Antoniu Pop, Nhat Minh Lê, Adrien Guatto, Mihai T. Lazarescu, Luciano Lavagno, Andrei Sergeevich Terechko, Miguel Glassee, Daniel Calvo, Eduardo de las Heras:
EU FP7-288307 Pharaon Project: Parallel and Heterogeneous Architecture for Real-Time Applications. DSD 2013: 371-378 - [c133]Shahzad Ahmad Butt, Luciano Lavagno:
Design space exploration and synthesis for digital signal processing algorithms from Simulink models. IDT 2013: 1-6 - [c132]Sarmad Ullah Khan, Thibault Cholez, Thomas Engel, Luciano Lavagno:
A key management scheme for Content Centric Networking. IM 2013: 828-831 - [c131]Shahzad Ahmad Butt, Stéphane Mancini, Frédéric Rousseau, Luciano Lavagno:
Design of a pseudo-log image transform IP in an HLS-based memory management framework. Real-Time Image and Video Processing 2013: 86560B - [c130]Ali Sayyed, Luciano Lavagno, Shah Khalid, Najeeb Ur Rahman:
Implementation and performance analysis of variable latency adders. SoCC 2013: 267-272 - 2012
- [j53]Luciano Lavagno, Patrick Haspel:
Selected Articles from the CDNLive! EMEA 2012 Conference. J. Low Power Electron. 8(5): 725 (2012) - [c129]Marco Cannizzaro, Luciano Lavagno:
PID (Partial Inversion Data): An M-of-N Level-Encoded Transition Signaling Protocol for Asynchronous Global Communication. ASYNC 2012: 134-141 - [c128]Shahzad Ahmad Butt, Luciano Lavagno:
Designing parameterized signal processing ips for high level synthesis in a model based design environment. CODES+ISSS 2012: 295-304 - [c127]Alex Kondratyev, Luciano Lavagno, Mike Meyer, Yosinori Watanabe:
Exploiting area/delay tradeoffs in high-level synthesis. DATE 2012: 1024-1029 - [c126]Iakovos Mavroidis, Ioannis Mavroidis, Ioannis Papaefstathiou, Luciano Lavagno, Mihai T. Lazarescu, Eduardo de la Torre, Florian Schäfer:
FASTCUDA: Open Source FPGA Accelerator & Hardware-Software Codesign Toolset for CUDA Kernels. DSD 2012: 343-348 - [c125]Luciano Lavagno, Mihai T. Lazarescu, Ioannis Papaefstathiou, Andreas Brokalakis, Johan Walters, Bart Kienhuis, Florian Schäfer:
HEAP: A Highly Efficient Adaptive Multi-processor Framework. DSD 2012: 509-516 - [c124]Alberto Puggelli, Mohammad Mostafizur Rahman Mozumdar, Alberto L. Sangiovanni-Vincentelli, Luciano Lavagno:
A routing-algorithm-aware design tool for indoor wireless sensor networks. ICNC 2012: 964-969 - [c123]Zhen Yu Song, Luciano Lavagno, Riccardo Tomasi, Maurizio A. Spirito:
A Service-driven Development Tool for Wireless Sensor Network. PECCS 2012: 87-95 - [c122]Mihai T. Lazarescu, Luciano Lavagno:
Dynamic Trace-Based Data Dependency Analysis for Parallelization of C Programs. SCAM 2012: 126-131 - [c121]Sarmad Ullah Khan, Claudio Pastrone, Luciano Lavagno, Maurizio A. Spirito:
An Authentication and Key Establishment Scheme for the IP-Based Wireless Sensor Networks. ANT/MobiWIS 2012: 1039-1045 - 2011
- [j52]Luciano Lavagno, Montek Singh:
Guest Editors' Introduction: Asynchronous Design Is Here to Stay (and Is More Mainstream Than You Thought). IEEE Des. Test Comput. 28(5): 4-6 (2011) - [c120]Nikolaos Andrikos, Luciano Lavagno:
Optimal and Heuristic Scheduling Algorithms for Asynchronous High-Level Synthesis. ASYNC 2011: 13-21 - [c119]Luigi Pomante, Antonio Spinosi, Mohammad Mostafizur Rahman Mozumdar, Stefano Olivieri, Luciano Lavagno:
An extended framework for WSN applications. CCNC 2011: 965-966 - [c118]Sarmad Ullah Khan, Claudio Pastrone, Luciano Lavagno, Maurizio A. Spirito:
An Energy and Memory-Efficient Key Management Scheme for Mobile Heterogeneous Sensor Networks. CRiSIS 2011: 25-32 - [c117]Alex Kondratyev, Luciano Lavagno, Mike Meyer, Yosinori Watanabe:
Realistic performance-constrained pipelining in high-level synthesis. DATE 2011: 1382-1387 - [c116]Shahzad Ahmad Butt, Luciano Lavagno:
Model-based rapid prototyping of multirate digital signal processing algorithms. NORCHIP 2011: 1-4 - 2010
- [j51]Nikolaos Andrikos, Luciano Lavagno, Fabio Campi, Davide Pandini:
Improving Electro-Magnetic Interference of Embedded Systems Through Jittered-Delay Desynchronization. J. Low Power Electron. 6(4): 607-615 (2010) - [j50]Gianpiero Cabodi, Luciano Lavagno, Marco Murciano, Alex Kondratyev, Yosinori Watanabe:
Speeding-up heuristic allocation, scheduling and binding with SAT-based abstraction/refinement techniques. ACM Trans. Design Autom. Electr. Syst. 15(2): 12:1-12:34 (2010) - [c115]Luciano Lavagno, Alex Kondratyev, Yosinori Watanabe, Qiang Zhu, Mototsugu Fujii, Mitsuru Tatesawa, Noriyasu Nakayama:
Incremental high-level synthesis. ASP-DAC 2010: 701-706 - [c114]Anwar Al-Khateeb, Luciano Lavagno:
Energy and throughput optimization of a Zigbee-compatible MAC protocol for wireless sensor networks. CSNDSP 2010: 305-310 - [c113]Anwar Al-Khateeb, Jun Kyoung Kim, Luciano Lavagno, Mihai T. Lazarescu:
Energy optimization at the MAC layer for a forest fire monitoring wireless sensor network. ETFA 2010: 1-4 - [c112]Luigi Pomante, Antonio Spinosi, Mohammad Mostafizur Rahman Mozumdar, Stefano Olivieri, Luciano Lavagno:
An extended framework for the development of WSN applications. ICUMT 2010: 745-749 - [c111]Anwar Al-Khateeb, Luciano Lavagno:
Energy optimization framework for WSN design. IPSN 2010: 368-369 - [c110]Anwar Al-Khateeb, Luciano Lavagno:
MEOW: Model-based design of an energy-optimized protocol stack for wireless sensor networks. LCN 2010: 590-597 - [c109]Mohammad Mostafizur Rahman Mozumdar, Luciano Lavagno, Laura Vanzago, Alberto L. Sangiovanni-Vincentelli:
HILAC: A framework for Hardware In the Loop simulation and multi-platform Automatic Code Generation of WSN Applications. SIES 2010: 88-97 - [c108]Zhen Yu Song, Mohammad Mostafizur Rahman Mozumdar, Maurizio Tranchero, Luciano Lavagno, Riccardo Tomasi, Stefano Olivieri:
Hy-Sim: model based hybrid simulation framework for WSN application development. SimuTools 2010: 87
2000 – 2009
- 2009
- [j49]Mohammad Mostafizur Rahman Mozumdar, Guofang Nan, Francesco Gregoretti, Luciano Lavagno, Laura Vanzago:
An Efficient Data Aggregation Algorithm for Cluster-based Sensor Network. J. Networks 4(7): 598-606 (2009) - [j48]Mohammad Mostafizur Rahman Mozumdar, Luciano Lavagno, Laura Vanzago:
A comparison of software platforms for wireless sensor networks: MANTIS, TinyOS, and ZigBee. ACM Trans. Embed. Comput. Syst. 8(2): 12:1-12:23 (2009) - [c107]Emre Tuncer, Jordi Cortadella, Luciano Lavagno:
Enabling adaptability through elastic clocks. DAC 2009: 8-10 - [c106]Anwar Al-Khateeb, Noureddine Boujnah, Luciano Lavagno:
Efficient energy consumption and node distribution algorithm of 802.15.4 physical layer for WSN. Wireless Days 2009: 1-6 - [p3]Luciano Lavagno, Claudio Passerone:
Design of Embedded Systems. Embedded Systems Design and Verification 2009: 2 - 2008
- [c105]Josep Carmona, Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev:
A Symbolic Algorithm for the Synthesis of Bounded Petri Nets. Petri Nets 2008: 92-111 - [c104]Mohammad Mostafizur Rahman Mozumdar, Francesco Gregoretti, Luciano Lavagno, Laura Vanzago:
Porting application between wireless sensor network software platforms: TinyOS, MANTIS and ZigBee. ETFA 2008: 1145-1148 - [c103]Mohammad Mostafizur Rahman Mozumdar, Francesco Gregoretti, Luciano Lavagno, Laura Vanzago:
An Algorithm for Selecting the Cluster Leader in a Partially Connected Sensor Network. ICSNC 2008: 133-138 - [c102]Mohammad Mostafizur Rahman Mozumdar, Francesco Gregoretti, Luciano Lavagno, Laura Vanzago, Stefano Olivieri:
A Framework for Modeling, Simulation and Automatic Code Generation of Sensor Network Application. SECON 2008: 515-522 - 2007
- [j47]Alexander Taubin, Jordi Cortadella, Luciano Lavagno, Alex Kondratyev, Ad M. G. Peeters:
Design Automation of Real-Life Asynchronous Devices and Systems. Found. Trends Electron. Des. Autom. 2(1): 1-133 (2007) - [c101]Nikolaos Andrikos, Luciano Lavagno, Davide Pandini, Christos P. Sotiriou:
A Fully-Automated Desynchronization Flow for Synchronous Circuits. DAC 2007: 982-985 - [c100]Luca Necchi, Alvise Bonivento, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli, Laura Vanzago:
E2RINA: an Energy Efficient and Reliable In-Network Aggregation for Clustered Wireless Sensor Networks. WCNC 2007: 3364-3369 - 2006
- [j46]Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Christos P. Sotiriou:
Desynchronization: Synthesis of Asynchronous Circuits From Synchronous Specifications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(10): 1904-1921 (2006) - [c99]Luca Necchi, Luciano Lavagno, Davide Pandini, Laura Vanzago:
An ultra-low energy asynchronous processor for Wireless Sensor Networks. ASYNC 2006: 78-85 - 2005
- [j45]Alberto La Rosa, Luciano Lavagno, Claudio Passerone:
Software Development for High-Performance, Reconfigurable, Embedded Multimedia Systems. IEEE Des. Test Comput. 22(1): 28-38 (2005) - [j44]Gianpiero Cabodi, Alex Kondratyev, Luciano Lavagno, Sergio Nocco, Stefano Quer, Yosinori Watanabe:
A BMC-based formulation for the scheduling problem of hardware systems. Int. J. Softw. Tools Technol. Transf. 7(2): 102-117 (2005) - [j43]Alberto La Rosa, Luciano Lavagno, Claudio Passerone:
Implementation of a UMTS turbo decoder on a dynamically reconfigurable platform. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(1): 100-106 (2005) - [j42]Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Claudio Passerone, Yosinori Watanabe:
Quasi-static scheduling of independent tasks for reactive systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(10): 1492-1514 (2005) - [j41]Paul Caspi, Alberto L. Sangiovanni-Vincentelli, Luís Almeida, Albert Benveniste, Bruno Bouyssounouse, Giorgio C. Buttazzo, Ivica Crnkovic, Werner Damm, Jakob Engblom, Gerhard Fohler, Marisol García-Valls, Hermann Kopetz, Yassine Lakhnech, François Laroussinie, Luciano Lavagno, Giuseppe Lipari, Florence Maraninchi, Philipp Peti, Juan Antonio de la Puente, Norman Scaife, Joseph Sifakis, Robert de Simone, Martin Törngren, Paulo Veríssimo, Andy J. Wellings, Reinhard Wilhelm, Tim A. C. Willemse, Wang Yi:
Guidelines for a graduate curriculum on embedded software and systems. ACM Trans. Embed. Comput. Syst. 4(3): 587-611 (2005) - [c98]Luciano Lavagno, Claudio Passerone, Vishal Shah, Yosinori Watanabe:
A Time Slice Based Scheduler Model for System Level Design. DATE 2005: 378-383 - [p2]Luciano Lavagno, Claudio Passerone:
Design of Embedded Systems. The Industrial Information Technology Handbook 2005: 1-14 - [r3]Luciano Lavagno, Claudio Passerone:
Design of Embedded Systems. Embedded Systems Handbook 2005 - [r2]Luciano Lavagno, Claudio Passerone, Alex Kondratyev, Yosinori Watanabe:
Quasi-Static Scheduling of Concurrent Specifications. Embedded Systems Handbook 2005 - [r1]Luciano Lavagno, Richard Zurawski:
Embedded Systems. Embedded Systems Handbook 2005 - 2004
- [j40]Luciano Lavagno:
DAC Highlights. IEEE Des. Test Comput. 21(3): 259-260 (2004) - [j39]Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Alexander Taubin, Yosinori Watanabe:
Quasi-static Scheduling for Concurrent Architectures. Fundam. Informaticae 62(2): 171-196 (2004) - [j38]Ivan Blunno, Luciano Lavagno:
Designing an asynchronous microcontroller using Pipefitter. IEEE Trans. Very Large Scale Integr. Syst. 12(7): 696-699 (2004) - [c97]Ivan Blunno, Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Kelvin Lwin, Christos P. Sotiriou:
Handshake Protocols for De-Synchronization. ASYNC 2004: 149-158 - [c96]Jean-Yves Brunel, Marco Di Natale, Alberto Ferrari, Paolo Giusto, Luciano Lavagno:
SoftContract: an Assertion-Based Software Development Process that Enables Design-by-Contract. DATE 2004: 358-363 - [c95]Alberto La Rosa, Claudio Passerone, Francesco Gregoretti, Luciano Lavagno:
Implementation of a UMTS Turbo-Decoder on a Dynamically Reconfigurable Platform. DATE 2004: 1218-1223 - [c94]Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Kelvin Lwin, Christos P. Sotiriou:
From Synchronous to Asynchronous: An Automatic Approach. DATE 2004: 1368-1369 - [c93]Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Christos P. Sotiriou:
Coping with The Variability of Combinational Logic Delays. ICCD 2004: 505-508 - [c92]Luciano Lavagno, Marco Di Natale, Alberto Ferrari, Paolo Giusto:
SoftContract: Model-Based Design of Error-Checking Code and Property Monitors. UML Satellite Activities 2004: 150-162 - [e4]Mary Jane Irwin, Wei Zhao, Luciano Lavagno, Scott A. Mahlke:
Proceedings of the 2004 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2004, Washington DC, USA, September 22 - 25, 2004. ACM 2004, ISBN 1-58113-890-3 [contents] - 2003
- [j37]Felice Balarin, Yosinori Watanabe, Harry Hsieh, Luciano Lavagno, Claudio Passerone, Alberto L. Sangiovanni-Vincentelli:
Metropolis: An Integrated Electronic System Design Environment. Computer 36(4): 45-52 (2003) - [j36]Luciano Lavagno, Limor Fix:
DAC Highlights. IEEE Des. Test Comput. 20(3): 88-89 (2003) - [j35]Alberto L. Sangiovanni-Vincentelli, Luciano Lavagno:
Guest Editors' Introduction: Trends and Directions in Microelectronics. IEEE Micro 23(3): 6-7 (2003) - [j34]David T. Blaauw, Luciano Lavagno:
Guest Editorial. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(8): 962-963 (2003) - [c91]Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Yosinori Watanabe:
Quasi-Static Scheduling for Concurrent Architectures. ACSD 2003: 29-40 - [c90]Alberto La Rosa, Luciano Lavagno, Claudio Passerone:
Hardware/Software Design Space Exploration for a Reconfigurable Processor. DATE 2003: 10570-10575 - [c89]Laura Vanzago, Bishnupriya Bhattacharya, Joel Cambonie, Luciano Lavagno:
Design Space Exploration for a Wireless Protocol on a Reconfigurable Platform. DATE 2003: 10662-10667 - [c88]Fabio Campi, Andrea Cappelli, Roberto Guerrieri, Andrea Lodi, Mario Toma, Alberto La Rosa, Luciano Lavagno, Claudio Passerone, Roberto Canegallo:
A Reconfigurable Processor Architecture and Software Development Environment for Embedded Systems. IPDPS 2003: 171 - [c87]Gianpiero Cabodi, Sergio Nocco, Stefano Quer, Alex Kondratyev, Luciano Lavagno, Yosinori Watanabe:
A BMC-formulation for the scheduling problem in highly constrained hardware Systems. BMC@CAV 2003: 623-638 - [p1]Rong Chen, Marco Sgroi, Luciano Lavagno, Grant Martin, Alberto L. Sangiovanni-Vincentelli, Jan M. Rabaey:
UML and Platform-based Design. UML for Real 2003: 107-126 - [e3]Luciano Lavagno, Grant Martin, Bran Selic:
UML for Real - Design of Embedded Real-Time Systems. Kluwer 2003, ISBN 978-1-4020-7501-8 [contents] - 2002
- [j33]David T. Blaauw, Luciano Lavagno:
Guest Editors' Introduction: Hot Topics at This Year's Design Automation Conference. IEEE Des. Test Comput. 19(4): 72-73 (2002) - [j32]Hiroshi Saito, Alex Kondratyev, Jordi Cortadella, Luciano Lavagno, Alex Yakovlev, Takashi Nanya:
Design of Asynchronous Controllers with Delay Insensitive Interface. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(12): 2577-2585 (2002) - [j31]Luciano Lavagno:
Guest Editor?s Introduction: Systems on a Chip--The Next Electronic Frontier. IEEE Micro 22(5): 14-15 (2002) - [j30]Jordi Cortadella, Michael Kishinevsky, Steven M. Burns, Alex Kondratyev, Luciano Lavagno, Ken S. Stevens, Alexander Taubin, Alexandre Yakovlev:
Lazy transition systems and asynchronous circuit synthesis withrelative timing assumptions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(2): 109-130 (2002) - [j29]Marcello Lajolo, Anand Raghunathan, Sujit Dey, Luciano Lavagno:
Cosimulation-based power estimation for system-on-chip design. IEEE Trans. Very Large Scale Integr. Syst. 10(3): 253-266 (2002) - [c86]Felice Balarin, Luciano Lavagno, Claudio Passerone, Alberto L. Sangiovanni-Vincentelli, Marco Sgroi, Yosinori Watanabe:
Modeling and Designing Heterogeneous Systems. Concurrency and Hardware Design 2002: 228-273 - [c85]Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Claudio Passerone, Yosinori Watanabe:
Quasi-Static Scheduling of Independent Tasksfor Reactive Systems. ICATPN 2002: 80-100 - [c84]Felice Balarin, Luciano Lavagno, Claudio Passerone, Alberto L. Sangiovanni-Vincentelli, Yosinori Watanabe, Guang Yang:
Concurrent execution semantics and sequential simulation algorithms for the metropolis meta-model. CODES 2002: 13-18 - [c83]G. Arrigoni, L. Duchini, Claudio Passerone, Luciano Lavagno, Yosinori Watanabe:
False Path Elimination in Quasi-Static Scheduling. DATE 2002: 964-970 - [c82]Felice Balarin, Luciano Lavagno, Claudio Passerone, Yosinori Watanabe:
Processes, Interfaces and Platforms. Embedded Software Modeling in Metropolis. EMSOFT 2002: 407-416 - [c81]Paolo Giusto, Jean-Yves Brunel, Alberto Ferrari, Eliane Fourgeau, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli:
Automotive Virtual Integration Platforms: Why's, What's, and How's. ICCD 2002: 370-378 - [c80]Paolo Giusto, Jean-Yves Brunel, Alberto Ferrari, Eliane Fourgeau, Luciano Lavagno, Barry O'Rourke, Alberto L. Sangiovanni-Vincentelli, Emanuele Guasto:
Models of IP's for Automotive Virtual Integration Platforms. ICCD 2002: 379- - [c79]Ivan Blunno, Luciano Lavagno:
Designing an Asynchronous Microcontroller Using Pipefitter. ICCD 2002: 488-493 - [c78]Luciano Lavagno, Mihai T. Lazarescu, Stefano Quer, Sergio Nocco, Claudio Passerone, Gianpiero Cabodi:
A Symbolic Approach for the Combined Solution of Scheduling and Allocation. ISSS 2002: 237-242 - [c77]Luciano Lavagno, Sujit Dey, Rajesh K. Gupta:
Specification, Modeling and Design Tools for System-on-Chip (Tutorial Abstract). ASP-DAC/VLSI Design 2002: 21-23 - 2001
- [j28]Harry Hsieh, Felice Balarin, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli:
Synchronous approach to the functional equivalence of embeddedsystem implementations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(8): 1016-1033 (2001) - [c76]Alberto La Rosa, Luciano Lavagno, Claudio Passerone:
A software development tool chain for a reconfigurable processor. CASES 2001: 93-98 - [c75]Marco Antoniotti, Alberto Ferrari, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli, Ellen Sentovich:
Embedded system design specification: merging reactive control and data computation. CDC 2001: 3302-3307 - [c74]Grant Martin, Luciano Lavagno, Jean Louis-Guerin:
Embedded UML: a merger of real-time UML and co-design. CODES 2001: 23-28 - [c73]André Chátelain, Yves Mathys, Giovanni Placido, Alberto La Rosa, Luciano Lavagno:
High-level architectural co-simulation using Esterel and C. CODES 2001: 189-194 - [c72]Leonardo Maria Reyneri, Franceso Cucinotta, Alessandro Serra, Luciano Lavagno:
A Hardware/Software Co-design Flow and IP Library Based of SimulinkTM. DAC 2001: 593-598 - [c71]Claudio Passerone, Yosinori Watanabe, Luciano Lavagno:
Generation of minimal size code for scheduling graphs. DATE 2001: 668-673 - [c70]Felice Balarin, Jerry R. Burch, Luciano Lavagno, Yosinori Watanabe, Roberto Passerone, Alberto L. Sangiovanni-Vincentelli:
Constraints specification at higher levels of abstraction. HLDVT 2001: 129-133 - [c69]Radu Marculescu, Amit Nandi, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli:
System-Level Power/Performance Analysis of Portable Multimedia Systems Communicating over Wireless Channels. ICCAD 2001: 207- - 2000
- [j27]Marco Sgroi, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli:
Formal Models for Embedded System Design. IEEE Des. Test Comput. 17(2): 14-27 (2000) - [j26]Stefano Quer, Gianpiero Cabodi, Paolo Camurati, Luciano Lavagno, Ellen Sentovich, Robert K. Brayton:
Verification of Similar FSMs by Mixing Incremental Re-encoding, Reachability Analysis, and Combinational Checks. Formal Methods Syst. Des. 17(2): 107-134 (2000) - [j25]Leonardo Maria Reyneri, Marcello Chiaberge, Luciano Lavagno, Begoña Pino, E. Miranda:
Simulink-Based HW/SW Codesign of Embedded Neuro-Fuzzy Systems. Int. J. Neural Syst. 10(3): 211-226 (2000) - [c68]Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev:
Hardware and Petri Nets: Application to Asynchronous Circuit Design. ICATPN 2000: 1-15 - [c67]Ivan Blunno, Luciano Lavagno:
Automated Synthesis of Micro-Pipelines from Behavioral Verilog HDL. ASYNC 2000: 84-92 - [c66]Jwahar R. Bammi, Wido Kruijtzer, Luciano Lavagno, Edwin A. Harcourt, Mihai T. Lazarescu:
Software performance estimation strategies in a system-level design tool. CODES 2000: 82-86 - [c65]Marcello Lajolo, Luciano Lavagno, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante:
Automatic test bench generation for simulation-based validation. CODES 2000: 136-140 - [c64]Alberto L. Sangiovanni-Vincentelli, Marco Sgroi, Luciano Lavagno:
Formal Models for Communication-Based Design. CONCUR 2000: 29-47 - [c63]Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Marc Massot, Sandra Moral, Claudio Passerone, Yosinori Watanabe, Alberto L. Sangiovanni-Vincentelli:
Task generation and compile-time scheduling for mixed data-control embedded software. DAC 2000: 489-494 - [c62]Harry Hsieh, Felice Balarin, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli:
Efficient methods for embedded system design space exploration. DAC 2000: 607-612 - [c61]Chunghee Kim, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli:
Free MDD-Based Software Optimization Techniques for Embedded Systems. DATE 2000: 14-18 - [c60]Marcello Lajolo, Anand Raghunathan, Sujit Dey, Luciano Lavagno:
Efficient Power Co-Estimation Techniques for System-on-Chip Design. DATE 2000: 27-34 - [c59]Marcello Lajolo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Luciano Lavagno:
Evaluating System Dependability in a Co-Design Framework. DATE 2000: 586-590 - [c58]Marcello Lajolo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Luciano Lavagno:
System-level test bench generation in a co-design framework. ETW 2000: 25-30 - [c57]Luciano Lavagno, Begoña Pino, Leonardo Maria Reyneri, A. Serra:
A Simulink(c)-Based Approach to System Level Design and Architecture Selection. EUROMICRO 2000: 1076-1083 - [c56]Marcello Lajolo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Luciano Lavagno:
Behavioral-level test vector generation for system-on-chip designs. HLDVT 2000: 21-26 - [c55]Mihai T. Lazarescu, Jwahar R. Bammi, Edwin A. Harcourt, Luciano Lavagno, Marcello Lajolo:
Compilation-based software performance estimation for system level design. HLDVT 2000: 167-172 - [c54]Marcello Lajolo, Luciano Lavagno, Matteo Sonza Reorda, Massimo Violante:
Early Power Estimation for System-on-Chip Designs. PATMOS 2000: 108-117
1990 – 1999
- 1999
- [j24]Alex Kondratyev, Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, Alexandre Yakovlev:
Logic decomposition of speed-independent circuits. Proc. IEEE 87(2): 347-362 (1999) - [j23]Felice Balarin, Massimiliano Chiodo, Paolo Giusto, Harry Hsieh, Attila Jurecska, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli, Ellen Sentovich, Kei Suzuki:
Synthesis of software programs for embedded control applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18(6): 834-849 (1999) - [j22]Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Enric Pastor, Alexandre Yakovlev:
Decomposition and technology mapping of speed-independent circuits using Boolean relations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18(9): 1221-1236 (1999) - [c53]Marco Sgroi, Luciano Lavagno, Yosinori Watanabe, Alberto L. Sangiovanni-Vincentelli:
Quasi-Static Scheduling of Embedded Software Using Equal Conflict Nets. ICATPN 1999: 208-227 - [c52]Marcello Lajolo, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli:
Fast Instruction Cache Simulation Strategies in a Hardware/Software Co-Design Environment. ASP-DAC 1999: 347- - [c51]Alexander Taubin, Alex Kondratyev, Jordi Cortadella, Luciano Lavagno:
Behavioral Transformations to Increase Noise Immunity in Asynchronous Specifications. ASYNC 1999: 36- - [c50]Alex Kondratyev, Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, Alexandre Yakovlev:
Automatic Synthesis and Optimization of Partially Specified Asynchronous Systems. DAC 1999: 110-115 - [c49]Luciano Lavagno, Ellen Sentovich:
ECL: A Specification Environment for System-Level Design. DAC 1999: 511-516 - [c48]Marco Sgroi, Luciano Lavagno:
Synthesis of Embedded Software Using Free-Choice Petri Nets. DAC 1999: 805-810 - [c47]Bassam Tabbara, Marco Sgroi, Alberto L. Sangiovanni-Vincentelli, Enrica Filippi, Luciano Lavagno:
Fast Hardware-Software Co-simulation Using VHDL Models. DATE 1999: 309- - [c46]Hiroshi Saito, Alex Kondratyev, Jordi Cortadella, Luciano Lavagno, Alexandre Yakovlev:
What is the cost of delay insensitivity? ICCAD 1999: 316-323 - [c45]Alberto L. Sangiovanni-Vincentelli, Marco Re, Luciano Lavagno, Gian Carlo Cardarilli, Roberto Lojacono:
Analysis of the quantization noise effects on the SQNR behaviour in analog to digital conversion. ISCAS (2) 1999: 334-338 - [c44]Srinivas Devadas, Sharad Malik, José Monteiro, Luciano Lavagno:
CAD Techniques for Embedded System Design. VLSI Design 1999: 608 - [e2]Ahmed Amine Jerraya, Luciano Lavagno, Frank Vahid:
Proceedings of the Seventh International Workshop on Hardware/Software Codesign, CODES 1999, Rome, Italy, 1999. ACM 1999, ISBN 1-58113-132-1 [contents] - 1998
- [j21]Stefano Cardelli, Massimiliano Chiodo, Paolo Giusto, Attila Jurecska, Luciano Lavagno, Claudio Sansoè, Alberto L. Sangiovanni-Vincentelli:
Rapid-Prototyping of Embedded Systems via Reprogrammable Devices. Des. Autom. Embed. Syst. 3(2-3): 149-161 (1998) - [j20]Felice Balarin, Luciano Lavagno, Praveen K. Murthy, Alberto L. Sangiovanni-Vincentelli:
Scheduling for Embedded Real-Time Systems. IEEE Des. Test Comput. 15(1): 71-82 (1998) - [j19]Alex Kondratyev, Michael Kishinevsky, Alexander Taubin, Jordi Cortadella, Luciano Lavagno:
The Use of Petri Nets for the Design and Verification of Asynchronous Circuits and Systems. J. Circuits Syst. Comput. 8(1): 67-118 (1998) - [j18]Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, Alexandre Yakovlev:
Deriving Petri Nets for Finite Transition Systems. IEEE Trans. Computers 47(8): 859-882 (1998) - [j17]Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexander Saldanha, Alexander Taubin:
Partial-scan delay fault testing of asynchronous circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(11): 1184-1199 (1998) - [j16]Claudio Passerone, Claudio Sansoè, Luciano Lavagno, Patrick C. McGeer, Jonathan Martin, Roberto Passerone, Alberto L. Sangiovanni-Vincentelli:
Modeling reactive systems in Java. ACM Trans. Design Autom. Electr. Syst. 3(4): 515-523 (1998) - [c43]Luciano Lavagno:
System-Level Design Models and Implementation Techniques. ACSD 1998: 24-32 - [c42]Alex Kondratyev, Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, Alexander Taubin, Alexandre Yakovlev:
Identifying State Coding Conflicts in Asynchronous System Specifications Using Petri Net Unfoldings. ACSD 1998: 152-163 - [c41]Marcello Lajolo, Anand Raghunathan, Sujit Dey, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli:
A case study on modeling shared memory access effects during performance analysis of HW/SW systems. CODES 1998: 117-121 - [c40]Youpyo Hong, Peter A. Beerel, Luciano Lavagno, Ellen Sentovich:
Don't Care-Based BDD Minimization for Embedded Software. DAC 1998: 506-509 - [c39]Tullio Cuatto, Claudio Passerone, Luciano Lavagno, Attila Jurecska, Antonino Damiano, Claudio Sansoè, Alberto L. Sangiovanni-Vincentelli:
A Case Study in Embedded System Design: An Engine Control Unit. DAC 1998: 804-807 - [c38]Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexander Taubin, Alexandre Yakovlev:
Lazy transition systems: application to timing optimization of asynchronous circuits. ICCAD 1998: 324-331 - [c37]Gaetano Borriello, Luciano Lavagno, Ross B. Ortega:
Interface synthesis: a vertical slice from digital logic to software components. ICCAD 1998: 693-695 - [c36]Enrica Filippi, Luciano Lavagno, L. Licciardi, Archille Montanaro, Maurizio Paolini, Roberto Passerone, Marco Sgroi, Alberto L. Sangiovanni-Vincentelli:
Intellectual Property Re-use in Embedded System Co-design: An Industrial Case Study. ISSS 1998: 37-42 - [e1]Gaetano Borriello, Ahmed Amine Jerraya, Luciano Lavagno:
Proceedings of the Sixth International Workshop on Hardware/Software Codesign, CODES 1998, Seattle, Washington, USA, March 15-18, 1998. IEEE Computer Society 1998, ISBN 0-8186-8442-9 [contents] - 1997
- [j15]Luciano Lavagno, Nanette Collins:
DAC 97 Panel: Next-Generation HDLs. IEEE Des. Test Comput. 14(3): 7-8 (1997) - [j14]Stephen A. Edwards, Luciano Lavagno, Edward A. Lee, Alberto L. Sangiovanni-Vincentelli:
Design of embedded systems: formal models, validation, and synthesis. Proc. IEEE 85(3): 366-390 (1997) - [j13]Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev:
A region-based theory for state assignment in speed-independent circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(8): 793-812 (1997) - [c35]Michael Kishinevsky, Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Alexander Taubin, Alexandre Yakovlev:
Coupling Asynchrony and Interrupts: Place Chart Nets. ICATPN 1997: 328-347 - [c34]Claudio Passerone, Luciano Lavagno, Claudio Sansoè, Massimiliano Chiodo, Alberto L. Sangiovanni-Vincentelli:
Trade-off evaluation in embedded system design via co-simulation. ASP-DAC 1997: 291-297 - [c33]Alex Kondratyev, Michael Kishinevsky, Jordi Cortadella, Luciano Lavagno, Alexandre Yakovlev:
Technology Mapping for Speed-Independent Circuits: Decomposition and Resynthesis. ASYNC 1997: 240-253 - [c32]Alexei L. Semenov, Alexandre Yakovlev, Enric Pastor, Marco A. Peña, Jordi Cortadella, Luciano Lavagno:
Partial order based approach to synthesis of speed-independent circuits. ASYNC 1997: 254- - [c31]Felice Balarin, Massimiliano Chiodo, Attila Jurecska, Luciano Lavagno, Bassam Tabbara, Alberto L. Sangiovanni-Vincentelli:
Automatic Generation of a Real-Time Operating System for Embedded Systems. CODES 1997: 95-100 - [c30]Claudio Passerone, Luciano Lavagno, Massimiliano Chiodo, Alberto L. Sangiovanni-Vincentelli:
Fast Hardware/Software Co-Simulation for Virtual Prototyping and Trade-Off Analysis. DAC 1997: 389-394 - [c29]Gianpiero Cabodi, Paolo Camurati, Luciano Lavagno, Stefano Quer:
Disjunctive Partitioning and Partial Iterative Squaring: An Effective Approach for Symbolic Traversal of Large Circuits. DAC 1997: 728-733 - [c28]Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev:
Technology mapping of speed-independent circuits based on combinational decomposition and resynthesis. ED&TC 1997: 98-105 - [c27]Gianpiero Cabodi, Paolo Camurati, Luciano Lavagno, Stefano Quer:
Verification and synthesis of counters based on symbolic techniques. ED&TC 1997: 176-181 - [c26]Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Enric Pastor, Alexandre Yakovlev:
Decomposition and technology mapping of speed-independent circuits using Boolean relations. ICCAD 1997: 220-227 - [c25]Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexander Saldanha, Alexander Taubin:
Partial scan delay fault testing of asynchronous circuits. ICCAD 1997: 728-735 - [c24]Raj S. Mitra, Bishnupriya Bhattacharya, Luciano Lavagno:
Asynchronous Implementation of Synchronous Esterel Specifications. VLSI Design 1997: 348-355 - 1996
- [j12]Massimiliano Chiodo, Daniel W. Engels, Paolo Giusto, Harry Hsieh, Attila Jurecska, Luciano Lavagno, Kei Suzuki, Alberto L. Sangiovanni-Vincentelli:
A case study in computer-aided co-design of embedded controllers. Des. Autom. Embed. Syst. 1(1-2): 51-67 (1996) - [j11]Alexandre Yakovlev, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli:
A Unified Signal Transition Graph Model for Asynchronous Control Circuit Synthesis. Formal Methods Syst. Des. 9(3): 139-188 (1996) - [j10]Alexandre Yakovlev, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Marta Pietkiewicz-Koutny:
On the Models for Asynchronous Circuit Behaviour with OR Causality. Formal Methods Syst. Des. 9(3): 189-233 (1996) - [c23]Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alex Yakovlev:
Complete state encoding based on the theory of regions. ASYNC 1996: 36-47 - [c22]Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev:
Methodology and Tools for State Encoding in Asynchronous Circuit Synthesis. DAC 1996: 63-66 - [c21]Felice Balarin, Harry Hsieh, Attila Jurecska, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli:
Formal Verification of Embedded Systems based on CFSM Networks. DAC 1996: 568-571 - [c20]Gianpiero Cabodi, Paolo Camurati, Luciano Lavagno, Stefano Quer, Robert K. Brayton, Ellen Sentovich:
Incremental re-encoding for symbolic traversal of product machines. EURO-DAC 1996: 158-163 - [c19]Alok Agrawal, Alexander Saldanha, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli:
Compact and complete test set generation for multiple stuck-faults. ICCAD 1996: 212-219 - [c18]Gianpiero Cabodi, Luciano Lavagno, Enrico Macii, Massimo Poncino, Stefano Quer, Paolo Camurati, Ellen Sentovich:
Enhancing FSM Traversal by Temporary Re-Encoding. ICCD 1996: 6-11 - [c17]Francesco Gregoretti, F. Intini, Luciano Lavagno, Roberto Passerone, Leonardo Maria Reyneri:
Design and Implementation of the Control Structure of the PAPRICA-3 Processor. PDP 1996: 290-296 - [c16]Stefano Cardelli, Massimiliano Chiodo, Paolo Giusto, Attila Jurecska, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli:
Rapid-Prototyping of Embedded Systems via Reprogrammable Devices. RSP 1996: 133-139 - 1995
- [j9]Alexandre Yakovlev, Albert Koelmans, Luciano Lavagno:
High-Level Modeling and Design of Asynchronous Interface Logic. IEEE Des. Test Comput. 12(1): 32-40 (1995) - [j8]Luciano Lavagno, Cho W. Moon, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli:
An efficient heuristic procedure for solving the state assignment problem for event-based specifications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(1): 45-60 (1995) - [j7]Luciano Lavagno, Kurt Keutzer, Alberto L. Sangiovanni-Vincentelli:
Synthesis of hazard-free asynchronous circuits with bounded wire delays. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(1): 61-86 (1995) - [j6]Kurt Keutzer, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli:
Synthesis for testability techniques for asynchronous circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(12): 1569-1577 (1995) - [c15]Luciano Lavagno, Patrick C. McGeer, Alexander Saldanha, Alberto L. Sangiovanni-Vincentelli:
Timed Shannon Circuits: A Power-Efficient Design Style and Synthesis Tool. DAC 1995: 254-260 - [c14]Massimiliano Chiodo, Paolo Giusto, Attila Jurecska, Luciano Lavagno, Harry Hsieh, Kei Suzuki, Alberto L. Sangiovanni-Vincentelli, Ellen Sentovich:
Synthesis of Software Programs for Embedded Control Applications. DAC 1995: 587-592 - [c13]Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, Alexandre Yakovlev:
Synthesizing Petri nets from state-based models. ICCAD 1995: 164-171 - 1994
- [j5]Massimiliano Chiodo, Paolo Giusto, Attila Jurecska, Harry Hsieh, Alberto L. Sangiovanni-Vincentelli, Luciano Lavagno:
Hardware-software codesign of embedded systems. IEEE Micro 14(4): 26-36 (1994) - [j4]Alexandre Yakovlev, A. Petrov, Luciano Lavagno:
A low latency asynchronous arbitration circuit. IEEE Trans. Very Large Scale Integr. Syst. 2(3): 372-377 (1994) - [j3]Luciano Lavagno, Narendra V. Shenoy, Alberto L. Sangiovanni-Vincentelli:
Linear programming for hazard elimination in asynchronous circuits. J. VLSI Signal Process. 7(1-2): 137-160 (1994) - [c12]Alexandre Yakovlev, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno:
OR Causality: Modelling and Hardware Implementation. Application and Theory of Petri Nets 1994: 568-587 - [c11]Jordi Cortadella, Luciano Lavagno, Peter Vanbekbergen, Alex Yakovlev:
Designing asynchronous circuits from behavioural specifications with internal conflicts. ASYNC 1994: 106-115 - [c10]Luciano Lavagno, Massimiliano Chiodo, Paolo Giusto, Attila Jurecska, Harry Hsieh, S. Yee, Alberto L. Sangiovanni-Vincentelli, Kei Suzuki:
A case study in computer-aided codesign of embedded controllers. CODES 1994: 220-224 - [c9]Luciano Lavagno, Antonio Lioy, Michael Kishinevsky:
Testing redundant asynchronous circuits by variable phase splitting. EURO-DAC 1994: 328-333 - [c8]Alberto Broggi, Gianni Conte, G. Burzio, Luciano Lavagno, Francesco Gregoretti, Claudio Sansoè, Leonardo Maria Reyneri:
PAPRICA-3: A Real-Time Morhphological Image Processor. ICIP (3) 1994: 654-658 - 1993
- [j2]Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli:
Automated synthesis of asynchronous interface circuits. Microprocess. Microsystems 17(4): 232-242 (1993) - [c7]Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli:
Automated Synthesis of Asynchronous Interface Circuits. Asynchronous Design Methodologies 1993: 107-121 - 1992
- [j1]Sharad Malik, Luciano Lavagno, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli:
Symbolic minimization of multilevel logic and the input encoding problem. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(7): 825-843 (1992) - [c6]Luciano Lavagno, Cho W. Moon, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli:
Solving the State Assignment Problem for Signal Transition Graphs. DAC 1992: 568-572 - [c5]Alexandre Yakovlev, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli:
A unified signal transition graph model for asynchronous control circuit synthesis. ICCAD 1992: 104-111 - [c4]Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli:
Linear Programming for Optimum Hazard Elimination in Asynchronous Circuits. ICCD 1992: 275-278 - 1991
- [c3]Luciano Lavagno, Kurt Keutzer, Alberto L. Sangiovanni-Vincentelli:
Algorithms for Synthesis of Hazard-Free Asynchronous Circuits. DAC 1991: 302-308 - [c2]Kurt Keutzer, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli:
Synthesis for Testability Techniques for Asynchronous Circuits. ICCAD 1991: 326-329 - 1990
- [c1]Luciano Lavagno, Sharad Malik, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli:
MIS-MV: Optimization of Multi-Level Logic with Multiple-Valued Inputs. ICCAD 1990: 560-563
Coauthor Index
Mihai T. Lazarescu
aka: Mihai Teodor Lazarescu
aka: Mihai Teodor Lazarescu
Mohammad Mostafizur Rahman Mozumdar
aka: Mohammad Mozumdar
aka: Mohammad Mozumdar
[j63] [j55] [c124] [c109] [c100] [j41] [j37] [j35] [p1] [c86] [c84] [c81] [c80] [j28] [c75] [c70] [c69] [j27] [c64] [c63] [c62] [c61] [j23] [c53] [c52] [c47] [c45] [j21] [j20] [j16] [c41] [c39] [c36] [j14] [c34] [c31] [c30] [j12] [j11] [c21] [c19] [c16] [j8] [j7] [j6] [c15] [c14] [j5] [j3] [c10] [j2] [c7] [j1] [c6] [c5] [c4] [c3] [c2] [c1]
Alexandre Yakovlev
aka: Alex Yakovlev
aka: Alex Yakovlev
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