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ORCIDAnkit Wagle
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2020 – today
- 2024
[j4]Ankit Wagle, Gian Singh
, Sunil P. Khatri, Sarma B. K. Vrudhula:
An ASIC Accelerator for QNN With Variable Precision and Tunable Energy Efficiency. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(7): 2057-2070 (2024)- 2023
- [j3]Ankit Wagle, Jinghua Yang, Niranjan Kulkarni, Sarma B. K. Vrudhula:
A New Approach to Clock Skewing for Area and Power Optimization of ASICs Using Differential Flipflops and Local Clocking. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 4164-4176 (2023) - 2022
- [j2]Ankit Wagle, Sarma B. K. Vrudhula:
Heterogeneous FPGA Architecture Using Threshold Logic Gates for Improved Area, Power, and Performance. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(6): 1855-1867 (2022) - [j1]Ankit Wagle, Gian Singh, Sunil P. Khatri, Sarma B. K. Vrudhula:
A Novel ASIC Design Flow Using Weight-Tunable Binary Neurons as Standard Cells. IEEE Trans. Circuits Syst. I Regul. Pap. 69(7): 2968-2981 (2022) - [c7]Ayushi Dube, Ankit Wagle, Gian Singh, Sarma B. K. Vrudhula:
Tunable Precision Control for Approximate Image Filtering in an In-Memory Architecture with Embedded Neurons. ICCAD 2022: 151:1-151:9 - [i4]Ankit Wagle, Gian Singh, Sunil P. Khatri, Sarma B. K. Vrudhula:
A Novel ASIC Design Flow using Weight-Tunable Binary Neurons as Standard Cells. CoRR abs/2204.08070 (2022) - 2021
- [c6]Gian Singh, Ankit Wagle, Sarma B. K. Vrudhula, Sunil P. Khatri:
CIDAN: Computing in DRAM with Artificial Neurons. ICCD 2021: 349-356 - [i3]Ankit Wagle, Sunil P. Khatri, Sarma B. K. Vrudhula:
A Configurable BNN ASIC using a Network of Programmable Threshold Logic Standard Cells. CoRR abs/2104.01699 (2021) - [i2]Gian Singh, Ankit Wagle, Sarma B. K. Vrudhula, Sunil P. Khatri:
CIDAN: Computing in DRAM with Artificial Neurons. CoRR abs/2112.00117 (2021) - 2020
- [c5]Ankit Wagle, Sunil P. Khatri, Sarma B. K. Vrudhula:
A Configurable BNN ASIC using a Network of Programmable Threshold Logic Standard Cells. ICCD 2020: 433-440 - [c4]Elham Azari, Ankit Wagle, Sunil P. Khatri, Sarma B. K. Vrudhula:
A Statistical Methodology for Post-Fabrication Weight Tuning in a Binary Perceptron. ISQED 2020: 141-148
2010 – 2019
- 2019
- [c3]Ankit Wagle, Elham Azari, Sarma B. K. Vrudhula:
Embedding Binary Perceptrons in FPGA to improve Area, Power and Performance. ICCAD 2019: 1-8 - [c2]Ankit Wagle, Gian Singh, Jinghua Yang, Sunil P. Khatri, Sarma B. K. Vrudhula:
Threshold Logic in a Flash. ICCD 2019: 550-558 - [i1]Ankit Wagle, Gian Singh, Jinghua Yang, Sunil P. Khatri, Sarma B. K. Vrudhula:
Threshold Logic in a Flash. CoRR abs/1910.04910 (2019) - 2018
- [c1]Ankit Wagle, Jinghua Yang, Aykut Dengi, Sarma B. K. Vrudhula:
FPGAs with Reconfigurable Threshold Logic Gates for Improved Performance, Power and Area. FPL 2018: 256-259
Coauthor Index
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