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2020 – today
- 2024
[j5]Qirui Zhang
, Zichen Fan, Hyochan An, Zhehong Wang, Ziyun Li, Guanru Wang, Pierre Abillama, Hun-Seok Kim, David T. Blaauw, Dennis Sylvester:
RoboVisio: A Micro-Robot Vision Domain-Specific SoC for Autonomous Navigation Enabling Fully-on-Chip Intelligence via 2-MB eMRAM. IEEE J. Solid State Circuits 59(8): 2644-2658 (2024)- [j4]Zichen Fan, Qirui Zhang, Hyochan An, Boxun Xu, Li Xu, Chien-Wei Tseng, Yimai Peng, Andrea Bejarano-Carbo, Pierre Abillama, Ang Cao, Bowen Liu, Changwoo Lee, Zhehong Wang, Hun-Seok Kim, David T. Blaauw, Dennis Sylvester:
AIMMI: Audio and Image Multi-Modal Intelligence via a Low-Power SoC With 2-MByte On-Chip MRAM for IoT Devices. IEEE J. Solid State Circuits 59(10): 3488-3501 (2024) - [c11]Siyuan Wu, Hao Tian, Weiran Zhang, Tingtong Zhu, Fuwen Tian, Zhehong Wang, Wanchun Dou:
A Heterogeneous Federated Learning Method Based on Dual Teachers Knowledge Distillation. ADMA (2) 2024: 192-207 - 2022
- [c10]Zichen Fan, Hyochan An, Qirui Zhang, Boxun Xu, Li Xu, Chien-Wei Tseng, Yimai Peng, Ang Cao, Bowen Liu, Changwoo Lee, Zhehong Wang, Fanghao Liu, Guanru Wang, Shenghao Jiang, Hun-Seok Kim, David T. Blaauw, Dennis Sylvester:
Audio and Image Cross-Modal Intelligence via a 10TOPS/W 22nm SoC with Back-Propagation and Dynamic Power Gating. VLSI Technology and Circuits 2022: 18-19 - [c9]Qirui Zhang, Hyochan An, Zichen Fan, Zhehong Wang, Ziyun Li, Guanru Wang, Hun-Seok Kim, David T. Blaauw, Dennis Sylvester:
A 22nm 3.5TOPS/W Flexible Micro-Robotic Vision SoC with 2MB eMRAM for Fully-on-Chip Intelligence. VLSI Technology and Circuits 2022: 72-73 - [i1]Zhehong Wang, Dennis Sylvester, Hun-Seok Kim, David T. Blaauw:
Hardware Acceleration for Third-Generation FHE and PSI Based on It. CoRR abs/2204.11334 (2022) - 2021
- [j3]Zhehong Wang, Tianjun Zhang, Daichi Fujiki, Arun Subramaniyan, Xiao Wu, Makoto Yasuda, Satoru Miyoshi, Masaru Kawaminami, Reetuparna Das, Satish Narayanasamy, David T. Blaauw:
A 2.46M Reads/s Seed-Extension Accelerator for Next-Generation Sequencing Using a String-Independent PE Array. IEEE J. Solid State Circuits 56(3): 824-833 (2021) - [j2]Ziyun Li, Zhehong Wang, Li Xu, Qing Dong, Bowen Liu, Chin-I Su, Wen-Ting Chu, George Tsou, Yu-Der Chih, Tsung-Yung Jonathan Chang, Dennis Sylvester, Hun-Seok Kim, David T. Blaauw:
RRAM-DNN: An RRAM and Model-Compression Empowered All-Weights-On-Chip DNN Accelerator. IEEE J. Solid State Circuits 56(4): 1105-1115 (2021) - 2020
- [c8]Zhehong Wang, Tianjun Zhang, Daichi Fujiki, Arun Subramaniyan, Xiao Wu, Makoto Yasuda, Satoru Miyoshi, Masaru Kawaminami, Reetuparna Das, Satish Narayanasamy, David T. Blaauw:
A 2.46M reads/s Genome Sequencing Accelerator using a 625 Processing-Element Array. CICC 2020: 1-4 - [c7]Jongyup Lim, Myungjoon Choi, Bowen Liu, Taewook Kang, Ziyun Li, Zhehong Wang, Yiqun Zhang, Kaiyuan Yang, David T. Blaauw, Hun-Seok Kim, Dennis Sylvester:
AA-ResNet: Energy Efficient All-Analog ResNet Accelerator. MWSCAS 2020: 603-606 - [c6]Xiao Wu, Arun Subramaniyan, Zhehong Wang, Satish Narayanasamy, Reetu Das, David T. Blaauw:
17.3 GCUPS Pruning-Based Pair-Hidden-Markov-Model Accelerator for Next-Generation DNA Sequencing. VLSI Circuits 2020: 1-2 - [c5]Zhehong Wang, Ziyun Li, Li Xu, Qing Dong, Chin-I Su, Wen-Ting Chu, George Tsou, Yu-Der Chih, Tsung-Yung Jonathan Chang, Dennis Sylvester, Hun-Seok Kim, David T. Blaauw:
An All-Weights-on-Chip DNN Accelerator in 22nm ULL Featuring 24×1 Mb eRRAM. VLSI Circuits 2020: 1-2
2010 – 2019
- 2019
- [j1]Qing Dong, Zhehong Wang, Jongyup Lim, Yiqun Zhang, Mahmut E. Sinangil, Yi-Chun Shih, Yu-Der Chih, Tsung-Yung Jonathan Chang, David T. Blaauw, Dennis Sylvester:
A 1-Mb 28-nm 1T1MTJ STT-MRAM With Single-Cap Offset-Cancelled Sense Amplifier and In Situ Self-Write-Termination. IEEE J. Solid State Circuits 54(1): 231-239 (2019) - [c4]Tutu Ajayi, Vidya A. Chhabria, Mateus Fogaça, Soheil Hashemi, Abdelrahman Hosny, Andrew B. Kahng, Minsoo Kim, Jeongsup Lee, Uday Mallappa, Marina Neseem, Geraldo Pradipta, Sherief Reda, Mehdi Saligane, Sachin S. Sapatnekar, Carl Sechen, Mohamed Shalan, William Swartz, Lutong Wang, Zhehong Wang, Mingyu Woo, Bangqi Xu:
Toward an Open-Source Digital Flow: First Learnings from the OpenROAD Project. DAC 2019: 76 - 2018
- [c3]Qing Dong, Zhehong Wang, Jongyup Lim, Yiqun Zhang, Yi-Chun Shih, Yu-Der Chih, Tsung-Yung Jonathan Chang, David T. Blaauw, Dennis Sylvester:
A 1Mb 28nm STT-MRAM with 2.8ns read access time at 1.2V VDD using single-cap offset-cancelled sense amplifier and in-situ self-write-termination. ISSCC 2018: 480-482 - [c2]Supreet Jeloka, Zhehong Wang, Ruochen Xie, Sudhanshu Khanna, Steven Bartling, Dennis Sylvester, David T. Blaauw:
Energy Efficient Adiabatic FRAM with 0.99 PJ/Bit Write for IoT Applications. VLSI Circuits 2018: 85-86 - [c1]Kaiyuan Yang, Qing Dong, Zhehong Wang, Yi-Chun Shih, Yu-Der Chih, Tsung-Yung Jonathan Chang, David T. Blaauw, Dennis Sylvester:
A 28NM Integrated True Random Number Generator Harvesting Entropy from MRAM. VLSI Circuits 2018: 171-172
Coauthor Index
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