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Power optimization of real-time embedded systems on variable speed processors

Authors:

Youngsoo Shin,

Kiyoung Choi,

Takayasu SakuraiAuthors Info & Claims

ICCAD '00: Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design

Pages 365 - 368

Published: 05 November 2000 Publication History

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Abstract

Power efficient design of real-time embedded systems based on programmable processors becomes more important as system functionality is increasingly realized through software. This paper presents a power optimization method for real-time embedded applications on a variable speed processor. The method combines off-line and on-line components. The off-line component determines the lowest possible maximum processor speed while guaranteeing deadlines of all tasks. The on-line component dynamically varies the processor speed or bring a processor into a power-down mode according to the status of task set in order to exploit execution time variations and idle intervals. Experimental results show that the proposed method obtains a significant power reduction across several kinds of applications.

References

[1]

C. Hwang and A. Wu, "A predictive system shutdown method for energy saving of event-driven computation," in Proc. Int'l Conf. on Computer Aided Design, Nov. 1997, pp. 28-32.]]

Digital Library

Google Scholar

[2]

M. Weiser, B. Welch, A. Demers, and S. Shenker, "Scheduling for reduced CPU energy," in Proc. USENIX Symposium on Operating Systems Design and Implementation, 1994, pp. 13-23.]]

Digital Library

Google Scholar

[3]

F. Yao, A. Demers, and S. Shenker, "A scheduling model for reduced CPU energy," in Proc. IEEE Annual Foundations of Computer Science, 1995, pp. 374-382.]]

Digital Library

Google Scholar

[4]

Y. Shin and K. Choi, "Power conscious fixed priority scheduling for hard real-time systems," in Proc. Design Automat. Conf., June 1999, pp. 134-139.]]

Digital Library

Google Scholar

[5]

T. Pering, T. Burd, and R. Brodersen, "The simulation and evaluation of dynamic voltage scaling algorithms," in Proc. Int'l Symposium on Low Power Electronics and Design, Aug. 1998, pp. 76-81.]]

Digital Library

Google Scholar

[6]

C. L. Liu and James W. Layland, "Scheduling algorithms for multiprogramming in a hard real time environment," Journal of the ACM, vol. 20, no. 1, pp. 46-61, Jan. 1973.]]

Digital Library

Google Scholar

[7]

N. Audsley, A. Burns, M. Richardson, and A. Wellings, "Hard real-time scheduling: The deadline-monotonic approach," in Proc. IEEE Workshop on Real-Time Operating Systems and Software, May 1991, pp. 133-137.]]

Crossref

Google Scholar

[8]

J. Lehoczky, L. Sha, and Y. Ding, "The rate monotonic scheduling algorithm: Exact characterization and average case behavior," in Proc. IEEE Real-Time Systems Symposium, Dec. 1989, pp. 166-171.]]

Crossref

Google Scholar

[9]

D. Katcher, H. Arakawa, and J. Strosnider, "Engineering and analysis of fixed priority schedulers," IEEE Trans. on Software Eng., vol. 19, no. 9, pp. 920-934, Sept. 1993.]]

Digital Library

Google Scholar

[10]

T. Burd and R. Brodersen, "Processor design for portable systems," Journal of VLSI Signal Processing, vol. 13, no. 2/3, pp. 203-222, Aug. 1996.]]

Digital Library

Google Scholar

[11]

C. Locke, D. Vogel, and T. Mesler, "Building a predictable avionics platform in Ada: A case study," in Proc. IEEE Real-Time Systems Symposium, Dec. 1991.]]

Crossref

Google Scholar

[12]

A. Burns, K. Tindell, and A. Wellings, "Effective analysis for engineering real-time fixed priority schedulers," IEEE Trans. on Software Eng., vol. 21, no. 5, pp. 475-480, May 1995.]]

Digital Library

Google Scholar

[13]

J. Liu, J. Redondo, Z. Deng, T. Tia, R. Bettati, A. Silberman, M. Storch, R. Ha, and W. Shih, "PERTS: A prototyping environment for real-time systems," Tech. Rep. UIUCDCS-R-93-1802, University of Illinois, 1993.]]

Digital Library

Google Scholar

[14]

N. Kim, M. Ryu, S. Hong, M. Saksena, C. Choi, and H. Shin, "Visual assessment of a real-time system design: A case study on a CNC controller," in Proc. IEEE Real-Time Systems Symposium, Dec. 1996.]]

Digital Library

Google Scholar

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ICCAD '00: Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design

November 2000

558 pages

ISBN:0780364481

Conference Chair:
Ellen M. Sentovich
Cadence Berkley Labs., Berkley, California

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IEEE Press

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Published: 05 November 2000

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ICCAD '00

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ICCAD '00: International Conference on Computer Aided Design

November 5 - 9, 2000

California, San Jose

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Overall Acceptance Rate 457 of 1,762 submissions, 26%

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Chen YJahier Pagliari DMacii EPoncino MChen DHomayoun HTaskin B(2018)Battery-aware Design Exploration of Scheduling Policies for Multi-sensor DevicesProceedings of the 2018 Great Lakes Symposium on VLSI10.1145/3194554.3194588(201-206)Online publication date: 30-May-2018
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Srivastav MEhteshamuddin MStegner KNazhandali L(2015)Design of Ultra-Low Power Scalable-Throughput Many-Core DSP ApplicationsACM Transactions on Design Automation of Electronic Systems10.1145/272001820:3(1-21)Online publication date: 24-Jun-2015
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Anagnostopoulos IChabloz JKoutras IBartzas AHemani ASoudris D(2013)Power-aware dynamic memory management on many-core platforms utilizing DVFSACM Transactions on Embedded Computing Systems10.1145/2536747.253676213:1s(1-25)Online publication date: 6-Dec-2013
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Dynamic voltage leveling scheduling for real-time embedded systems on low-power variable speed processors

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Dynamic voltage leveling scheduling for real-time embedded systems on low-power variable speed processors

Analysis of power dissipation in embedded systems using real-time operating systems

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