Analog/mixed-signal IP modeling for design reuse
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- Analog/mixed-signal IP modeling for design reuse
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Accelerated design of analog, mixed-signal circuits in Titan
ISPD '09: Proceedings of the 2009 international symposium on Physical designAnalog circuits are designed in fundamentally different ways than their counterparts in the digital domain. However, two major trends have made analog and digital circuits mix and co-exist. First, high-performance analog circuits use digital parts and ...
Low-power mixed-signal CVNS-based 64-bit adder for media signal processing
In this paper, design of a mixed-signal 64-bit adder based on the continuous valued number system (CVNS) is presented. The 64-bit adder is generated by cascading four 16-bit radix-2 CVNS adders. Truncated summation of the CVNS digits reduced the number ...
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- EDAA: European Design Automation Association
- IFIP WG 10.5: IFIP WG 10.5
- ECSI
- EDAC: Electronic Design Automation Consortium
- SIGDA: ACM Special Interest Group on Design Automation
- IEEE-CS\TTTC: Test Technology Technical Council
- IEEE-CS\DATC: IEEE Computer Society
- The Russian Academy of Sciences: The Russian Academy of Sciences
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IEEE Press
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- EDAA
- IFIP WG 10.5
- EDAC
- SIGDA
- IEEE-CS\TTTC
- IEEE-CS\DATC
- The Russian Academy of Sciences
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