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View all- Kahng AKang SLi JPineda De Gyvez J(2015)An Improved Methodology for Resilient Design ImplementationACM Transactions on Design Automation of Electronic Systems10.1145/274946220:4(1-26)Online publication date: 28-Sep-2015
In this paper, we present scalability and process induced variation analysis of polarity gate silicon nanowire field-effect transistor. 3D simulation results show that the PGFET offers significant reduction in short channel effects and variability due ...
Timing margin to cover process variation is one of the most critical factors that limit the amount of supply voltage reduction thereby power consumption. To remove too conservative timing margin, Bubble Razor was introduced to dynamically detect and ...
In this paper, we report a study to understand the fin width dependence on performance, variability and reliability of n-type and p-type triple-gate fin field effect transistors (FinFETs) with high-k dielectric and metal gate. Our results indicate that ...
European Design and Automation Association
Leuven, Belgium
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