Performance-driven interconnection optimization for microarchitecture synthesis
References
[1]
Daniel D. Gajski, Nikil D. Dutt, Allen C-H. Wu and Steve Y-L. Lin, "High-Level Synthesis: Introduction to Chip and System Design," Kluwer Academzc Pubhshers, 1992
[2]
"LINDO Linear Interactive and Discrete Optimizer for Lin. ear, Integer, and Quadratic programming problems." LINDO System, inc.
[3]
T. Y. Lm, and Steve Y-L Lin, "FLORA: A Data Path Allo. cator Based on Branch-and-Bound Search", INTEGRATION, the VLSI Journal, pp. 43-46, March, 1991.
[4]
S Y. Kung, H. Whltehouse, and T Kailath, "VLSI ~ Mod. ern Signal Processing", Engle Wood Cliffs, N J, Prentice-Hall, 1985.
[5]
GENESIL Designer, Sihcon Compiler Systems Corporation, 1989.
[6]
Yi-Mm Jlang, Tsing-Fa Lee, Ting-Ting Hwang, and Youn. Long Lin, "Performance-Driven Interconnection Optimization for Microarchitecture Synthesis," Submitted to INTEGRA- TION, the VLSI Journal
[7]
P G Paulin, J. P. Knight and E F. Glrczyc, "HAL: A Multi. Paradigm Approach to Automatic Data Path Synthesis", 23rd ACM/IEEE Design Automation Conference, pp 263-270, Jul. 1976
[8]
P. G Paulin, and J. P. Knight, "Algorithms for High-Level Synthesis," IEEE Design & Test of Computers, pp 18-31, December 1989.
Index Terms
- Performance-driven interconnection optimization for microarchitecture synthesis
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Published: 01 November 1992
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