Efficient analog platform characterization through analog constraint graphs

We propose a scheme for improving the efficiency of the characterization process for system-level models of analog circuits within the analog platform based design paradigm. We leverage designer knowledge to map basic functional requirements of the circuit into circuit parameters relations so that the sampling space can be significantly reduced. A set of equalities and inequalities in the circuit parameters is used to represent the constraints. A feasible parameter space lies at the intersection of the sets of design parameters that satisfy equalities and inequalities, defining a manifold in the parameter space. We introduce a bipartite graph representation denoted analog constraint graphs (ACG) to represent these constraints. ACGs are instrumental for obtaining a random configuration generator that samples configurations in the manifold. The sampler is automatically translated into executable code to fit the characterization framework starting from a mathematical description of constraints. Results show that the automatically generated samplers are comparable in terms of code efficiency with hand-written ones. Furthermore, a heuristics to generate uniformly distributed configuration enabled by the tools is presented and applied to a complex ADC design, yielding a reduction in power consumption by more than 28%.