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File:Lattice iCE40LP-HX1K arch.png

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Lattice_iCE40LP-HX1K_arch.png (323 × 309 pixels, file size: 90 KB, MIME type: image/png)

Summary

[edit]
Non-free media information and use rationale true for iCE (FPGA)
Description

Diagram of Lattice Semiconductor iCE40 LP/HX1K architecture.

Source

Lattice Datasheet DS1040 (v01.2, 2013, p2-1)

Article

iCE (FPGA)

Portion used

Architecture diagram (labelled) only. Very small portion of the datasheet.

Low resolution?

Yes, of a size where further reduction would make the image unclear and unusable.

Purpose of use

To provide illustration of the architecture so as to enhance the clarity of the article.

Replaceable?

There is no free equivalent of this diagram that would not infringe.

Other information

Use of the diagram would not impact the value of the work or the product it describes, or impact the ability of the copyright holder to distribute the work or produce the product.

Fair useFair use of copyrighted material in the context of iCE (FPGA)//en.wikipedia.org/wiki/File:Lattice_iCE40LP-HX1K_arch.pngtrue

Licensing

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File history

Click on a date/time to view the file as it appeared at that time.

Date/TimeThumbnailDimensionsUserComment
current04:11, 19 July 2017Thumbnail for version as of 04:11, 19 July 2017323 × 309 (90 KB)DatBot (talk | contribs)Reduce size of non-free image (BOT - disable)
10:32, 8 April 2016No thumbnail470 × 450 (57 KB)LiamMcS (talk | contribs){{Non-free use rationale | Description = Diagram of Lattice Semiconductor iCE40 LP/HX1K architecture. | Source = Lattice Datasheet DS1040 (v01.2, 2013, p2-1) | Article = User:LiamMcS/Sandbox/iCE (FPGA) | Portion = A...

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