The Honeywell Level 6 was a 16-bit minicomputer line manufactured by Honeywell, Inc. from the mid 1970s.[1] In 1979 the Level 6 was renamed the DPS 6.
Description
As initially introduced the Level 6 consisted of three models: the 6/06, the 6/34, and the 6/36. The CPU featured a real-time clock, a ROM bootstrap loader and 64 interrupt levels. The architecture provided a variety of addressing modes and 18 programmer-visible registers. Rack-mount and tabletop versions were available.
These systems supported up to 64 K words of MOS memory with a cycle time or 650 nanoseconds.
All three models all featured the Megabus, which was a proprietary asynchronous bus architecture.
By 1978 the line had been extended downwards with the introduction of the 6/23 and 6/33, and upwards with the 6/43, 6/47, 6/53, and 6/57. The 6/23 did not support the Megabus. The 6/33 was the new entry-level upgradable model. The other four models supported up to 1 MW of memory and 26 registers. A memory management unit (MMU), optional on the 6/43 and 6/47, and standard on the 6/53 and 6/57, supported memory segmentation and four protection rings. An optional Scientific Instruction Processor (SIP) added single- and double-precision hardware floating-point instructions. The 6/47 and 6/57 were enhanced versions of the 6/43 and 6/53 respectively which added a Commercial Instruction Processor (CIP) including 30 additional instructions for character-string manipulation and decimal arithmetic.[2]
The operating system for the Level 6 was GCOS 6.
References
- ^ Honeywell, Inc. (January 1976). Honeywell Level 6 Minicomputer Handbook (PDF). Retrieved July 26, 2014.
- ^ Honeywell, Inc. (October 1978). Honeywell Level 6 Minicomputer Systems Handbook. Retrieved July 26, 2014.