Integrated circuit packaging: Difference between revisions

== History ==

[[File:Laptop Acrobat Model NBD 486C, Type DXh2 - California Micro Devices CMD 9324 on motherboard-9749.jpg|thumb|Small-outline integrated circuit. This package has 16 "gull wing" leads protruding from the two long sides and a lead spacing of 0.050 inches.]]

Commercial circuit packaging quickly moved to the [[dual in-line package]] (DIP), first in ceramic and later in plastic.<ref>{{Cite book|title=Electronic Inventions and Discoveries (2nd ed).|last=Dummer|first=G.W.A.|publisher=Pergamon Press|year=1978|isbn=0-08-022730-9}}</ref> In the 1980s [[VLSI]] pin counts exceeded the practical limit for DIP packaging, leading to [[pin grid array]] (PGA) and [[leadless chip carrier]] (LCC) packages.<ref name=":2">{{Cite book|title=CMOS: Circuit Design, Layout, and Simulation, Third Edition|last=Baker|first=R. Jacob|publisher=Wiley-IEEE|year=2010|isbn=978-0-470-88132-3}}</ref> [[Surface mount]] packaging appeared in the early 1980s and became popular in the late 1980s, using finer lead pitch with leads formed as either gull-wing or J-lead, as exemplified by [[small-outline integrated circuit]] — a carrier which occupies an area about 30 – 50% less than an equivalent [[Dual in-line package|DIP]], with a typical thickness that is 70% less.<ref name=":2" />[[File:RUS-IC.JPG|right|thumb|Early USSR-made integrated circuit. The tiny block of semiconducting material (the "die"), is enclosed inside the round, metallic case (the "package").]]The next big innovation was the ''area array package'', which places the interconnection [[Terminal (electronics)|terminals]] throughout the surface area of the package, providing a greater number of connections than previous package types where only the outer perimeter is used. The first area array package was a ceramic [[pin grid array]] package.<ref name=":02"/> Not long after, the plastic [[ball grid array]] (BGA), another type of area array package, became one of the most commonly used packaging techniques.<ref>{{cite book|title=Area array packaging processes for BGA, Flip Chip, and CSP|publisher=[[McGraw-Hill Professional]]|year=2003|isbn=0-07-142829-1|page=251|author=Ken Gilleo}}</ref>