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- ArticleApril 2003
Synthesis and placement flow for gain-based programmable regular fabrics
ISPD '03: Proceedings of the 2003 international symposium on Physical designPages 197–203https://doi.org/10.1145/640000.640041In this paper we present the Gain-based Logic Block Array (GLA), a new via-programmable regular fabric. GLA is an array of Gain-based Logic Blocks (GLBs). The GLB is a semi-universal logic block designed based on logical effort theory[12]. Customization ...
- ArticleApril 2003
Advanced routing in changing technology landscape
ISPD '03: Proceedings of the 2003 international symposium on Physical designPages 118–121https://doi.org/10.1145/640000.640027As process technology continue to advance, the operating environment for routing tools has changed significantly. While the general concept of routing and techniques employed remain the same,the complexities and challenges that modern-day routers face ...
- ArticleApril 2003
A complete design for power methodology and flow for large ASICs
ISPD '03: Proceedings of the 2003 international symposium on Physical designPages 106–108https://doi.org/10.1145/640000.640024Few aspects in ASIC design automation have become so pervasive as power. Design constraints due to power are being imposed throughout the entire design methodology and flow to control cost, reliability and performance of the products. With every future ...
- ArticleApril 2003
Benchmarking for large-scale placement and beyond
- Saurabh N. Adya,
- Mehmet C. Yildiz,
- Igor L. Markov,
- Paul G. Villarrubia,
- Phiroze N. Parakh,
- Patrick H. Madden
ISPD '03: Proceedings of the 2003 international symposium on Physical designPages 95–103https://doi.org/10.1145/640000.640022Over the last five years the VLSI Placement community achieved great strides in the understanding of placement problems, developed new high-performance algorithms, and achieved impressive empirical results. These advances have been supported by non-...
- ArticleApril 2003
Partition-driven standard cell thermal placement
ISPD '03: Proceedings of the 2003 international symposium on Physical designPages 75–80https://doi.org/10.1145/640000.640018The thermal problem has been emerged as one of the key issues for next-generation IC design. In this paper, we propose a scheme to achieve better thermal distribution for partition-driven standard cell placement. The proposed heuristic uses a multigrid-...
- ArticleApril 2003
Fine granularity clustering for large scale placement problems
ISPD '03: Proceedings of the 2003 international symposium on Physical designPages 67–74https://doi.org/10.1145/640000.640017In this paper we present a linear-time Fine Granularity Clustering (FGC) algorithm to reduce the size of large scale placement problems. FGC absorbs as many nets as possible into Fine Clusters. The absorbed nets are expected to be short in any good ...
- ArticleApril 2003
Signal integrity management in an SoC physical design flow
ISPD '03: Proceedings of the 2003 international symposium on Physical designPages 39–46https://doi.org/10.1145/640000.640011Signal integrity closure is one of the key challenges in DSM (Deep- SubMicron) physical design. In this paper, we propose a physical design methodology which includes signal integrity management through noise analysis and repair at multiple phases of ...
- ArticleApril 2003
Explicit gate delay model for timing evaluation
ISPD '03: Proceedings of the 2003 international symposium on Physical designPages 32–38https://doi.org/10.1145/640000.640010Delay evaluation is always a crucial concern in the VLSI design and it becomes increasingly more critical in the nowadays deep-submicron technology. To obtain an accurate delay value, the gate modeling is a key issue. As the VLSI feature size scaling ...
- ArticleApril 2003
3D thermal-ADI: an efficient chip-level transient thermal simulator
ISPD '03: Proceedings of the 2003 international symposium on Physical designPages 10–17https://doi.org/10.1145/640000.640007Recent studies show that the nonuniform thermal distribution on the substrate and interconnects has impact on the circuit reliability and performance. Hence three-dimensional (3-D) thermal analysis is crucial to analyze these effects. In this paper, we ...
