In this paper, we propose a novel approximation algorithm (RelaxSAT) for MIN-ONE SAT. RelaxSAT generates a set of constraints from the objective function to guide the search. The constraints are gradually relaxed to eliminate the conflicts with the ...

In this paper we propose an efficient VLSI implementation of a Soft Input Soft Output (SISO) arithmetic code (AC) decoder for joint source channel coding. The addressed application shows a very high level of processing complexity, but, to the best of ...

Pipelined execution of streaming applications enable processing of high-throughput data under performance constraint. We present an integrated approach to synthesizing pipelined software for dual-core architectures. We target streaming applications ...

In this paper a novel approach for Inverse Modified Cosine Transform (IMDCT) computation is presented, based on a recursive algorithm. Due to its nature, this IMDCT calculation can be performed on a reduced bit width datapath without loss of accuracy, ...

Statistical timing analysis needs a priori knowledge of process variations. Lack of such a priori knowledge of process variations prevents accurate statistical timing analysis, for which foundry confidentiality policy has largely been blamed. A ...

In this paper, we present a novel simulation approach for power grid network analysis. The new approach, called ETBR for extended truncated balanced realization, is based on model order reduction techniques to reduce the circuit matrices before the ...

Modern deep sub-micron ULSI designs with hundreds of millions of devices require huge grids for power distribution. Such grids, operating with increasingly low-power voltages, are a design limiting factor and accurate analysis of their behavior is of ...

Future nanoelectronics based arithmetic components will enjoy abundant hardware, yet at the same time confront severe unreliability challenges. We focus on the fault tolerance of high performance parallel prefix adders (PPA), and exploit the inherent ...

This paper presents an improved hardware structure for the computation of the Whirlpool hash function. By merging the round key computation with the data compression and by using embedded memories to perform part of the Galois Field (2⁸) multiplication, ...

This paper presents a method of dynamic voltage scaling (DVS) that tackles both switching and leakage power with combined V_dd/V_bs scaling and gives minimum average energy consumption exploiting the runtime distribution of software execution. We present ...

This paper presents a new carbon nanotube transistor (CNT) modelling technique which is based on an efficient numerical piece-wise non-linear approximation of the non-equilibrium mobile charge density. The technique facilitates the solution of the self-...

This paper presents a new application field for the Goertzel algorithm. The test of mixed-signal circuits involves the generation and analysis of signals. A standard method for the signal analysis is the Fast Fourier Transform (FFT algorithms). Such ...