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- ArticleDecember 2024
Clock-Dependent Probabilistic Timed Automata with One Clock and No Memory
Formal Methods and Software EngineeringPages 70–84https://doi.org/10.1007/978-981-96-0617-7_5AbstractClock-dependent probabilistic timed automata extend probabilistic timed automata by letting the probabilities of discrete transitions depend on the exact values of clock variables. The probabilistic reachability problem for clock-dependent ...
- ArticleDecember 2024
Tuning Trains Speed in Railway Scheduling
Formal Methods and Software EngineeringPages 37–50https://doi.org/10.1007/978-981-96-0617-7_3AbstractRailway scheduling consists in ensuring that a set of trains evolve in a shared rail network without collisions, while meeting schedule constraints. This problem is notoriously difficult, even more in the case of uncertain or even unknown train ...
- ArticleSeptember 2024
The Opacity of Timed Automata
AbstractOpacity serves as a critical security and confidentiality property, which concerns whether an intruder can unveil a system’s secret based on structural knowledge and observed behaviors. Opacity in timed systems presents greater complexity compared ...
- research-articleSeptember 2024
Formal timing analysis of gate-level digital circuits using model checking
Microprocessors & Microsystems (MSYS), Volume 109, Issue Chttps://doi.org/10.1016/j.micpro.2024.105083AbstractDue to the continuous reduction in the transistors sizing ruled by the Moore’s law, digital devices have become smaller, and more complex resulting in an enormous rise in the delay variations. Therefore, there is a dire need of precise and ...
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- research-articleJune 2024
Model checking timed recursive CTL
Information and Computation (ICOM), Volume 298, Issue Chttps://doi.org/10.1016/j.ic.2024.105168AbstractWe introduce Timed Recursive CTL, a merger of two extensions of the well-known branching-time logic CTL: Timed CTL is interpreted over real-time systems like timed automata; Recursive CTL introduces a powerful recursion operator which takes the ...
- research-articleMarch 2024
Symbolic analysis and parameter synthesis for networks of parametric timed automata with global variables using Maude and SMT solving
Science of Computer Programming (SCPR), Volume 233, Issue Chttps://doi.org/10.1016/j.scico.2023.103074AbstractThis paper presents a rewriting logic “interpreter” for networks of parametric timed automata with global variables (NPTAVs) in Real-Time Maude style. Since explicit-state analysis is not sound and complete for such dense-time systems, we explain ...
- research-articleSeptember 2023
Compositional verification of embedded real-time systems
Journal of Systems Architecture: the EUROMICRO Journal (JOSA), Volume 142, Issue Chttps://doi.org/10.1016/j.sysarc.2023.102928AbstractIn an embedded real-time system (ERTS), real-time tasks (software) are typically executed on a multicore shared-memory platform (hardware). The number of cores is usually small, contrasted with a larger number of complex tasks that share data to ...
- ArticleJuly 2023
A Unified Model for Real-Time Systems: Symbolic Techniques and Implementation
Computer Aided VerificationPages 266–288https://doi.org/10.1007/978-3-031-37706-8_14AbstractIn this paper, we consider a model of generalized timed automata (GTA) with two kinds of clocks, history and future, that can express many timed features succinctly, including timed automata, event-clock automata with and without diagonal ...
- research-articleJuly 2023
Automatic modelling and verification of Autosar architectures
Journal of Systems and Software (JSSO), Volume 201, Issue Chttps://doi.org/10.1016/j.jss.2023.111675AbstractAutosar (AUTomotive Open System ARchitecture) is a development partnership whose primary goal is the standardization of basic system functions and functional interfaces for electronic control units in automobiles. As an open specification, its ...
Highlights- A modelling tool, A2A, which extracts information from Autosar architectures.
- Modelling time-related behaviours of Autosar architectures using timed automata.
- A verification approach based on the generated interconnected timed ...
- research-articleJuly 2023
Diagnosis of timed patterns for discrete event systems by means of state isolation
Automatica (Journal of IFAC) (AJIF), Volume 153, Issue Chttps://doi.org/10.1016/j.automatica.2023.111045AbstractThis paper deals with the diagnosis of timed patterns for discrete event systems that are modeled by a particular class of timed automata. A timed pattern is a set of behaviors characterized by a sequence of events, occurring in a given order, ...
- research-articleMay 2023
Temporal graph patterns by timed automata
The VLDB Journal — The International Journal on Very Large Data Bases (VLDB), Volume 33, Issue 1Pages 25–47https://doi.org/10.1007/s00778-023-00795-zAbstractTemporal graphs represent graph evolution over time, and have been receiving considerable research attention. Work on expressing temporal graph patterns or discovering temporal motifs typically assumes relatively simple temporal constraints, such ...
- research-articleJanuary 2023
An evaluation of approaches to model checking real-time task schedulability analysis
International Journal on Software Tools for Technology Transfer (STTT) (STTT), Volume 25, Issue 1Pages 115–128https://doi.org/10.1007/s10009-022-00693-9AbstractThis article is a follow-up contribution that extends the conference paper (Nxumalo, in: Laarman, Sokolova (eds)Model Checking Software - 27th International Symposium, 2021) which presented the spotlight abstraction method to enable an efficient ...
- articleJanuary 2023
Controlling timed automata against MTL specifications with TACoS▪
Science of Computer Programming (SCPR), Volume 225, Issue Chttps://doi.org/10.1016/j.scico.2022.102898AbstractTACoS is a tool for synthesizing controllers against specifications of undesired behavior with timing constraints. Given a timed automaton and an MTL specification, the tool synthesizes a controller that guarantees that ...
Highlights- TACoS is a tool for controller synthesis against specifications with timing constraints.
- research-articleJanuary 2023
Timed network games
Information and Computation (ICOM), Volume 290, Issue Chttps://doi.org/10.1016/j.ic.2022.104996AbstractNetwork games are widely used as a model for selfish resource-allocation problems. The classical model abstracts the fact that different users may use a resource at different times and for different duration – factors that play an ...
- surveyDecember 2022
Timed Automata as a Formalism for Expressing Security: A Survey on Theory and Practice
ACM Computing Surveys (CSUR), Volume 55, Issue 6Article No.: 127, Pages 1–36https://doi.org/10.1145/3534967Timed automata are a common formalism for the verification of concurrent systems subject to timing constraints. They extend finite-state automata with clocks, that constrain the system behavior in locations, and to take transitions. While timed automata ...
- research-articleDecember 2022
Randomized reachability analysis in UPPAAL: fast error detection in timed systems
International Journal on Software Tools for Technology Transfer (STTT) (STTT), Volume 24, Issue 6Pages 1025–1042https://doi.org/10.1007/s10009-022-00681-zAbstractRandomized reachability analysis is an efficient method for detection of safety violations. Due to the under-approximate nature of the method, it excels at quick falsification of models and can greatly improve the model-based development process: ...
- research-articleDecember 2022
Rewriting Logic Semantics and Symbolic Analysis for Parametric Timed Automata
FTSCS 2022: Proceedings of the 8th ACM SIGPLAN International Workshop on Formal Techniques for Safety-Critical SystemsPages 3–15https://doi.org/10.1145/3563822.3569923This paper presents a rewriting logic semantics for parametric timed automata (PTAs) and shows that symbolic reachability analysis using Maude-with-SMT is sound and complete for the PTA reachability problem. We then refine standard Maude-with-SMT ...
- research-articleNovember 2022