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Functional and timing validation of high performing safety-related platforms requires testing specific traffic patterns in the network-on-chip interconnects. Generally, testing needs to be performed by using software tests whose degree of control on the ...

This study introduces a refined Flooding Injection Rate-adjustable Denial-of-Service (DoS) model for Network-on-Chips (NoCs) and more importantly presents DL2Fence, a novel framework utilizing Deep Learning (DL) and Frame Fusion (2F) for DoS detection ...

Sound techniques for mapping soft real-time applications to resources are indispensable for meeting the application deadlines and minimizing objectives such as energy consumption, particularly on heterogeneous MPSoC architectures. For applications with ...

The adoption of Network-on-Chip (NoC) as the backbone for Multiprocessor System-on-Chip (MPSoC) communications is becoming increasingly common due to its scalability. Nevertheless, the vulnerability of these systems to security exploits, particularly ...

Streaming applications are being extensively run on portable embedded systems, which are battery-operated and with limited memory. Thus, minimizing the total energy consumption of such a system is important. We investigate the problem of offline ...

• Scheduling periodic tasks on NoC-based MPSoCs to minimize energy, considering memory.
• New task mapping and scheduling using retiming and DVFS to reduce energy consumption.
• A heuristic to compute the memory usage of the schedule.

IoT architecture based on the multiprocessor system-on-chip (MPSoC) is widely used because of the third-party intellectual property cores (3PIPs) supplied globally. Therefore, 3PIPs present an intrinsic security risk. Decentralization of the ...

Deep Learning is ubiquitous today and is increasingly moving from the cloud down to the edge of networked infrastructures, where it enables embedded applications to perform complex inference tasks close to the data sources, reducing long-distance data ...

The proliferation of multiprocessor system-on-chip (MPSoC) architectures within the Internet of Things (IoT) has introduced notable security challenges. These architectures’ distributed nature, required for smooth communications between the IP ...

The recent innovations in real-time video and image enhancements are allowing much advancement in a wide range of diverse applications. These innovations and advancements provide a new hardware architecture that aims to improve image visualization,...

In embedded systems, tightly coupled memories (TCMs) are usually shared between multiple masters for the purpose of hardware efficiency and software flexibility. On the one hand, memory sharing improves area utilization, but on the other hand, ...

Embedded system applications often require guarantees regarding non-functional properties when executed on a given MPSoC platform. Examples of such requirements include real-time, energy, or safety properties on corresponding programs. One option to ...

When designing embedded systems, engineers have to consider non-functional requirements, such as real-time or energy consumption constraints. To enforce or counteract any potential violation of such constraints, feedback-based control techniques can ...

• Wireless Sensor Networks (WSNs) are the preferred choice for the design and deployment of next-generation monitoring and control systems.

Very intelligent compact sensors with low-power and inexpensive solutions have been created because of the industrial revolution and subsequent advancements in electrical technology and wireless communications. Modern innovative ...

The purpose of this article is to present a system that enhances the security, efficiency, and reconfigurability of an Internet-of-Things (IoT) system used for surveillance and monitoring. A Multi-Processor System-On-Chip (MPSoC) composed of ...

Deep Neutral Networks (DNNs) have been widely used in many applications, such as self-driving cars, natural language processing (NLP), image classification, visual object recognition, and so on. Field-programmable gate array (FPGA) based ...

Accelerators rich architectures have become the standard in today’s SoCs. After Moore’s law diminish, it is common to only dedicate a fraction of the area of the SoC to traditional cores and leave the rest of space for specialized hardware. This ...$\mathrm{}$$\mathrm{}$

To cope with the ever increasing threats of dynamic and adaptive persistent attacks, Fault and Intrusion Tolerance (FIT) is being studied at the hardware level to increase critical systems resilience. Based on state-machine replication, FIT is known ...

We are witnessing a race to meet the ever-growing computation requirements of emerging AI applications to provide perception and control in autonomous vehicles — e.g., self-driving cars and UAVs. To remain competitive, vendors are ...

The adoption of autonomous driving (AD) software executed on high-performance multi-processor systems on chip (MPSoCs) contributes to increasing the overall system’s safety and efficiency. However, existing AD software frameworks are provided as ...

Networks-on-Chips (NoC) based Multi-Processor System-on-Chip (MPSoC) are increasingly employed in industrial and consumer electronics. Outsourcing third-party IPs (3PIPs) and tools in NoC-based MPSoC is a prevalent development way in most fabless ...