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Many computational problems consider memory throughput a performance bottleneck, especially in the domain of parallel computing. Software needs to be attuned to hardware features like cache architectures or concurrent memory banks to reach a ...

• Proposing novel abstraction for flexible traversals of regular data structures.
• Designed for traversal-agnostic algorithms in HPC parallel computing.
• Reduces traversal code complexity, improving separation of concerns and ...

Smart contracts are programmable protocols that run on Ethereum and require gas to be deployed and used. Gas-expensive operations in some smart contracts can cause users to consume extra gas in transactions. There are already several ...

• Detection of waste gas problems in smart contract loops.
• Introducing pre-...

The Java Vector API is a new module introduced in Java 16, allowing developers to concisely express vector computations. The API promises both high performance, achieved via the runtime compilation of vector operations to hardware vector instructions, ...

Weak memory models for concurrent programming languages are expected to admit standard compiler optimizations. However, prior works on verifying optimizations in weak memory models are mostly focused on simple optimizations on small code snippets ...

Despite extensive testing and correctness certification of their functional semantics, a number of compiler optimizations have been shown to violate security guarantees implemented in source code. While prior work has shed light on how such optimizations ...

The iCetus tool is a new interactive parallelizer, providing users with a range of capabilities for the source-to-source transformation of C programs using OpenMP directives in shared memory machines. While the tool can parallelize code fully ...

Thanks to high-performance computing (HPC), it is possible to solve all kinds of highly complex projects from multiple scientific disciplines that require computationally intensive tasks to be undertaken and which otherwise could not be addressed. ...

Modern heterogeneous computing platforms have become powerful HPC solutions, which could be applied to a wide range of real-life applications. In particular, the hybrid platforms equipped with Intel Xeon Phi coprocessors offer the advantages of ...

In this paper we study the problem of optimizing linear erasure codes over GF(2) for single-hop wireless multicasting. We first present an algorithmic optimization technique which minimizes the number of transmissions given the knowledge of packets ...

High-level synthesis (HLS) is a potential solution to increase the productivity of FPGA-based real-time image processing development. It allows designers to reap the benefits of hardware implementation directly from the algorithm behaviors specified ...

We examine the scalable implementation of the lattice Boltzmann method (LBM) in the context of interface-resolved direct numerical simulation of wall-bounded turbulent particle-laden flows.Three distinct aspects relevant to performance optimization of ...

We present a new compiler framework for truly heterogeneous 3D stencil computation on GPU clusters. Our framework consists of a simple directive-based programming model and a tightly integrated source-to-source compiler. Annotated with a small number of ...

Variable length encoding can considerably decrease code size in VLIW processors by reducing the number of bits wasted on encoding No Operations(NOPs). A processor may have different instruction templates where different execution slots are implicitly ...

The Geostatistical Software Library (GSLIB) has been used in the geostatistical community for more than thirty years. It was designed as a bundle of sequential Fortran codes, and today it is still in use by many practitioners and researchers. Despite ...

In our previous work, we presented a brief analysis of the performance of the code block segmentation procedure adopted by the 3GPP LTE Advanced (LTE-A) Standard as part of its physical layer channel coding scheme. Here, a detailed analysis of its ...

In these days, every newly added hardware feature must not change the underlying instruction set architecture (ISA), in order to avoid adaptation or recompilation of existing code. Nevertheless, this need for compatibility imposes a great number of ...

We propose a simple method to implement matrix assembly in Galerkin meshfree methods.By looping over groups of quadrature points, performance is significantly improved.We propose a method to efficiently store the maximum entropy basis functions.It ...

Display Omitted A new time efficient complex network analysis library for dense networks is proposed.It is suited for the analysis, e.g. of several thousands of distributed brain sources.High performance is achieved by combined hard- and software ...

With the development of digital signal processing (DSP) processors, the design of retarget able C compiler is necessary. But the C compiler for media processors which is built by porting GCC can't generate effective complex instructions in its way of ...

Track-before-detect (TBD) algorithms are used for tracking systems, where the object's signal is below the noise floor (low-SNR objects). A lot of computations and memory transfers for real-time signal processing are necessary. GPGPU in parallel ...