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- research-articleMay 2015
Small-World Network Enabled Energy Efficient and Robust 3D NoC Architectures
GLSVLSI '15: Proceedings of the 25th edition on Great Lakes Symposium on VLSIPages 133–138https://doi.org/10.1145/2742060.2742085Three dimensional (3D) Network-on-Chip (NoC) architectures enable design of low power and high performance communication fabrics for multicore chips. In spite of achievable performance benefits, 3D NoCs are still bottlenecked by the planar ...
