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Fault-tolerant computing: theory and techniques; vol. 1May 1986
- Editor:
- Dhiraj K. Pradhan
Abstract
No abstract available.
Cited By
- Sullivan M, Hari S, Zimmer B, Tsai T and Keckler S SwapCodes Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, (762-774)
Sridharan R and Mahapatra R Reliability aware power management for dual-processor real-time embedded systems Proceedings of the 47th Design Automation Conference, (819-824)- Choudhury M and Mohanram K Masking timing errors on speed-paths in logic circuits Proceedings of the Conference on Design, Automation and Test in Europe, (87-92)
- Choudhury M and Mohanram K Approximate logic circuits for low overhead, non-intrusive concurrent error detection Proceedings of the conference on Design, automation and test in Europe, (903-908)
- Rossi D, Steiner C and Metra C Analysis of the impact of bus implemented EDCs on on-chip SSN Proceedings of the conference on Design, automation and test in Europe: Proceedings, (59-64)
- Gaubatz G, Sunar B and Karpovsky M Non-linear residue codes for robust public-key arithmetic Proceedings of the Third international conference on Fault Diagnosis and Tolerance in Cryptography, (173-184)
- Zhu D and Aydin H Energy management for real-time embedded systems with reliability requirements Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design, (528-534)
- Cox A, Mohanram K and Rixner S Dependable ≠ unaffordable Proceedings of the 1st workshop on Architectural and system support for improving software dependability, (58-62)
- Zhu D, Melhem R and Mossé D Energy efficient configuration for qos in reliable parallel servers Proceedings of the 5th European conference on Dependable Computing, (122-139)
- Sapiecha K and Lukawski G Fault-Tolerant protocols for scalable distributed data structures Proceedings of the 6th international conference on Parallel Processing and Applied Mathematics, (1018-1025)
- Bolchini C, Salice F, Sciuto D and Pomante L Reliable System Specification for Self-Checking Data-Paths Proceedings of the conference on Design, Automation and Test in Europe - Volume 2, (1278-1283)
- Lin S and Manimaran G A feedback-based adaptive algorithm for combined scheduling with fault-tolerance in real-time systems Proceedings of the 11th international conference on High Performance Computing, (101-110)
- Zhu D, Melhem R and Mosse D The effects of energy management on reliability in real-time embedded systems Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design, (35-40)
- Rossi D and Metra C (2019). Error Correcting Strategy for High Speed and High Density Reliable Flash Memories, Journal of Electronic Testing: Theory and Applications, 19:5, (511-521), Online publication date: 1-Oct-2003.
- Bolchini C, Pomante L, Salice F and Sciuto D (2019). Reliability Properties Assessment at System Level, Journal of Electronic Testing: Theory and Applications, 18:3, (351-356), Online publication date: 1-Jun-2002.
- Favalli M and Metra C (2019). Single Output Distributed Two-Rail Checker with Diagnosing Capabilities for Bus Based Self-Checking Architectures, Journal of Electronic Testing: Theory and Applications, 18:3, (273-283), Online publication date: 1-Jun-2002.
- Chen S and Fuchs W (2001). Compiler-Assisted Multiple Instruction Word Retry for VLIW Architectures, IEEE Transactions on Parallel and Distributed Systems, 12:12, (1293-1304), Online publication date: 1-Dec-2001.
- Bolchini C, Pomante L, Salice F and Sciuto D On-line fault detection in a hardware/software co-design environment Proceedings of the 14th international symposium on Systems synthesis, (51-56)
- Lajolo M (2018). Bus guardians, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 9:6, (974-982), Online publication date: 1-Dec-2001.
- Steininger A and Temple C (1999). Economic Online Self-Test in the Time-Triggered Architecture, IEEE Design & Test, 16:3, (81-89), Online publication date: 1-Jul-1999.
- Das D and Touba N Weight-Based Codes and Their Application to Concurrent Error Detection of Multilevel Circuits Proceedings of the 1999 17TH IEEE VLSI Test Symposium
- Ghosh S, Melhem R and Mossé D (2019). Fault-Tolerance Through Scheduling of Aperiodic Tasks in Hard Real-Time Multiprocessor Systems, IEEE Transactions on Parallel and Distributed Systems, 8:3, (272-284), Online publication date: 1-Mar-1997.
- Nagvajara P, Lin J, Nilagupta P and Wang C (2019). Multichip Module Diagnosis by Product-Code Signatures, Journal of Electronic Testing: Theory and Applications, 10:1-2, (127-136), Online publication date: 1-Feb-1997.
- Sosnowski J (2018). Transient Fault Tolerance in Digital Systems, IEEE Micro, 14:1, (24-35), Online publication date: 1-Feb-1994.
- Redinbo G, Napolitano L and Andaleon D (2019). Multibit Correcting Data Interface for Fault-Tolerant Systems, IEEE Transactions on Computers, 42:4, (433-446), Online publication date: 1-Apr-1993.
- Gantenbein R (1992). An annotated bibliography of dependable distributed computing, ACM SIGOPS Operating Systems Review, 26:2, (60-81), Online publication date: 1-Apr-1992.
- Raghavan V and Tripathi A (1991). Sequential Diagnosability is Co-NP Complete, IEEE Transactions on Computers, 40:5, (584-595), Online publication date: 1-May-1991.
- Cheung K, Sohi G, Saluja K and Pradhan D (2019). Design and Analysis of a Gracefully Degrading Interleaved Memory System, IEEE Transactions on Computers, 39:1, (63-71), Online publication date: 1-Jan-1990.
- Sohi G (2019). Cache Memory Organization to Enhance the Yield of High Performance VLSI Processors, IEEE Transactions on Computers, 38:4, (484-492), Online publication date: 1-Apr-1989.
- Meyer F and Pradhan D (2019). Flip-Trees, IEEE Transactions on Computers, 37:4, (472-478), Online publication date: 1-Apr-1988.
- Helliwell M and Perkowski M A fast algorithm to minimize multi-output mixed-polarity generalized Reed-Muller forms Proceedings of the 25th ACM/IEEE Design Automation Conference, (427-432)
Index Terms
- Fault-tolerant computing: theory and techniques; vol. 1
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